EP2A70B724I-9 vs EP2A70B724I-8 比較
詳細並排比較 EP2A70B724I-9 由 Altera 與 EP2A70B724I-8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP2A70B724I-9 - APEX II FPGA 70K LE, BGA-724, -9 Speed | Altera / Intel
EP2A70B724I-9 Obsolete
規格比較
| 參數 | EP2A70B724I-9 | EP2A70B724I-8 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements (typical) | 70,000 | — |
| Embedded RAM (ESB bits) | 4,290 Kbit | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| 封裝 | BGA-724 | — |
| Speed Grade | -9 | — |
| 工作溫度 | -40C to +100C (industrial, 'I' suffix) | -40 °C to +100 °C (Industrial) |
| Process Node | [DATA_NEEDED: process node] | — |
| Supply Voltage Core | 1.5 V (typical) | — |
| Supply Voltage I/O | 3.3 V (typical, multi-voltage I/O banks supported) | — |
| Configuration Method | Passive Serial, Passive Parallel, EPC4/EPC8/EPC16 enhanced configuration devices | JTAG / Passive Serial / Passive Parallel |
| Peak Reflow Temperature | 220 C | 220 °C (per JEDEC J-STD-020) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance] |
| Logic Elements / Cells | — | 67,200 cells |
| System Gates | — | 3,000,000 |
| Maximum Internal Frequency | — | 281 MHz |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage | — | 1.5 V |
| I/O Supply Voltage | — | 3.3 V |
| 腳位數 | — | 724 |
| Package Type | — | FCBGA (Flip-Chip Ball Grid Array) |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Embedded RAM | — | [DATA_NEEDED: total bits] |
| PLLs | — | [DATA_NEEDED: PLL count] |