EP2S130F1020I4N vs EP2S130F1020C5N 比較

詳細並排比較 EP2S130F1020I4N 由 Intel 與 EP2S130F1020C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S130F1020I4N EP2S130F1020C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 停產終止 NRND
Family Stratix II Stratix II
Logic Elements 132,540 132,540
Logic Array Blocks (LABs) 6,627 —
Total RAM Bits 6,747,840 —
User I/O Count 742 —
Core Voltage (VCCINT) 1.15 V to 1.25 V —
工作溫度 -40C to +100C (TJ, Industrial) Commercial (0C to +85C, C5 grade)
封裝 / 外殼 1020-BBGA (FineLine BGA, FC-FBGA) —
Supplier Device Package 1020-FBGA —
安裝類型 Surface Mount Surface Mount
Process Node 90 nm —
Internal Operating Frequency up to 711.24 MHz —
Speed Grade I4 (Industrial, speed bin 4) —
Configuration SRAM-based, volatile configuration memory —
Design Software Quartus II (legacy) —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: rohs status]
Lead-Free [DATA_NEEDED: lead-free / lead-bearing finish] [DATA_NEEDED: lead-free status]
Adaptive Logic Modules (ALMs) — 6627 LABs (per Jotrin listing)
Total Memory Bits — 6,747,840 bits
User I/Os — 734
Process Technology — 90 nm
Core Supply Voltage (VCCINT) — 1.15 V to 1.25 V
Maximum Internal Frequency — 609.76 MHz
封裝 — 1020-ball FC-FBGA (33x33 mm)
Temperature Grade — C5 (other - per Partstack)
PLLs — 4 (typical Stratix II feature)
Global Clock Networks — 16 (typical Stratix II feature)
Configuration Method — Serial/Parallel via Quartus II (typical Stratix II)
Country of Origin — Republic of Korea (per GlobalSpec)
ECCN — 3A001.a.7.a (per GlobalSpec)
Estimated EOL Date — 2023 (per GlobalSpec)

資料表與資源

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