EP2S15F672C4 vs EP2C50F672C8N 比較

詳細並排比較 EP2S15F672C4 由 Altera 與 EP2C50F672C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP2C50F672C8N EP2C50F672C8N - Cyclone II FPGA, 50K LE, 672-BGA | Intel / Altera

EP2C50F672C8N - Cyclone II FPGA, 50K LE, 672-BGA | Intel / Altera

EP2C50F672C8N ⚠ 最後購買機會

規格比較

參數 EP2S15F672C4 EP2C50F672C8N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND 最後購買
Family Stratix II —
Logic Elements 15,600 —
Embedded Memory Bits 419,328 bits —
DSP Blocks 156 (approximate, per Stratix II family) —
Maximum User I/Os 366 —
封裝 672-ball FineLine BGA (FBGA) 672-FBGA (FineLine BGA)
Process Node 90 nm —
PLLs 6 —
工作溫度 Commercial (0C to +85C, 'C' suffix) 0C to +85C (commercial)
Speed Grade 4 C8
Configuration Method Serial / Parallel (passive serial, fast passive parallel, JTAG) —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) —
RoHS 狀態 [DATA_NEEDED: RoHS compliance per Altera product page] [DATA_NEEDED: rohs status from datasheet]
Lead-Free [DATA_NEEDED: lead-free finish status] —
MSL 等級 [DATA_NEEDED: MSL moisture sensitivity level] —
Series — Cyclone II
Number of Logic Elements — 50,528
Number of Logic Array Blocks (LABs) — 4,608
Total RAM Bits — 594,432
Number of I/O — 450
Number of User I/O Banks — 8 (per family architecture)
Number of PLLs — 4
Number of DLLs — 2
Embedded 18x18 Multipliers — 86
Core Voltage — 1.2 V
Package Body Size — 27 mm x 27 mm
安裝類型 — Surface Mount
Process Technology — 90 nm low-k CMOS
Configuration — JTAG + serial/parallel

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