EP2S180F1508C4TT vs EP2S180F1508C4 比較
詳細並排比較 EP2S180F1508C4TT 由 Altera 與 EP2S180F1508C4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP2S180F1508C4TT - 180K Logic Elements FPGA | Altera | High-Performance Digital Logic
EP2S180F1508C4TT Obsolete
規格比較
| 參數 | EP2S180F1508C4TT | EP2S180F1508C4 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Product Type | Field-Programmable Gate Array (FPGA) | Field Programmable Gate Array (FPGA) |
| Device Family | Stratix II | — |
| Logic Elements | approximately 180,000 | — |
| User I/O | 1,170 pins | — |
| Logic Array Blocks | 8,970 LABs | — |
| 封裝 | 1,508-ball FBGA | — |
| 安裝類型 | Surface Mount | — |
| Temperature Grade | -T | — |
| Configuration Mechanism | [DATA_NEEDED: configuration mechanism] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature] | [DATA_NEEDED: operating temperature range] |
| Storage Temperature | [DATA_NEEDED: storage temperature] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Ball Pitch | [DATA_NEEDED: ball pitch] | — |
| Typical Power Dissipation | [DATA_NEEDED: typical power dissipation] | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Series | — | Stratix II |
| Logic Elements/Cells | — | 179,400 cells |
| Total RAM Bits | — | 9,383,040 bits |
| Number of I/O | — | 1,170 I/O |
| 供應電壓 | — | 1.15 V to 1.25 V |
| Process Technology | — | 90 nm |
| Operating Frequency | — | 711.24 MHz |
| Supplier Device Package | — | 1508-FBGA (40 mm x 40 mm) |
| 封裝 / 外殼 | — | 1508-BBGA, FCBGA |
| Terminal Count | — | 1,508 terminals |
| Terminal Form | — | Ball |
| Packaging | — | Tray |
| Time@Peak Reflow Temperature-Max | — | 30 s |
| Moisture Sensitivity Level | — | MSL 4 (72 hours) |
| Package Shape | — | Square |
| Configuration Technology | — | SRAM-based FPGA |