EP2S30F672I4 vs EP2S30F672C4 比較
詳細並排比較 EP2S30F672I4 由 Intel 與 EP2S30F672C4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S30F672I4 | EP2S30F672C4 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | Stratix II | Stratix II |
| Manufacturer | Intel (formerly Altera) | Intel (formerly Altera) |
| Logic Elements | 33880 | — |
| Logic Array Blocks (LABs) | 1694 | — |
| Total RAM Bits | 1369728 | 1,369,728 |
| Number of I/O | 500 | 500 |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | [DATA_NEEDED: PLL count for S30 tier] |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| 工作溫度 | -40C to +100C (Industrial) | 0C to +85C (commercial, 'C' speed grade) |
| 安裝類型 | Surface Mount | Surface Mount |
| 封裝 / 外殼 | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| RoHS 狀態 | [DATA_NEEDED: confirm RoHS compliance on part label] | Compliant |
| Logic Elements / Cells | — | 33,880 |
| 封裝 | — | 672-BBGA, FCBGA (27x27 mm) |
| Core Voltage - Supply | — | 1.15 V to 1.25 V |
| Maximum Core Frequency (datasheet benchmark) | — | 711 MHz |
| Embedded DSP Blocks | — | 16 (Stratix II S30 tier) |
| Number of Global Clock Networks | — | [DATA_NEEDED: global clock network count] |
| Lead-Free | — | Yes |