EP3SE260H780C4LG vs EP3SE260H780C2N 比較
詳細並排比較 EP3SE260H780C4LG 由 Altera 與 EP3SE260H780C2N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SE260H780C4LG | EP3SE260H780C2N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| Family | Stratix III Enhanced (EP3SE) | — |
| Logic Elements | 254,400 | 255,000 |
| Adaptive Logic Modules (ALMs) | 101,760 | — |
| Embedded Memory (M9K + M144K) | 18.36 Mbits | — |
| DSP Blocks (18-bit x 18-bit) | 768 | — |
| 18-bit x 18-bit Multipliers | 1,536 | — |
| Transceivers (full-duplex) | 8 (up to 6.375 Gbps) | — |
| Maximum User I/O Pins | 488 | — |
| 封裝 | 780-ball FineLine BGA (HBGA, 29 mm x 29 mm, 1.0 mm pitch) | 780-BGA FCBGA |
| Speed Grade | C4 (commercial, mid-speed tier) | C2 |
| Temperature Grade | Commercial (0C to +85C junction) | — |
| Process Technology | 65 nm TSMC low-power CMOS | — |
| Operating Voltage (Core) | 0.9 V / 1.0 V / 1.1 V (programmable) | — |
| External Memory Interface | Up to 800 Mbps DDR3, QDR II+, RLDRAM II | — |
| Hard IP Blocks | PCIe Gen2, 10GbE MAC, memory controllers | — |
| RoHS 狀態 | Compliant (Pb-free HBGA) | [DATA_NEEDED: rohs status] |
| MSL 等級 | 3 (per JEDEC J-STD-020) | 3 (168 hours) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Series | — | Stratix III E |
| LABs / CLBs | — | 10,200 |
| Total RAM Bits | — | 16,672,768 |
| User I/O Count | — | 488 |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Core Voltage | — | 0.9 V |
| 工作溫度範圍 | — | Commercial (0C to +85C) |
| Reflow Peak Time Max | — | 40 s |
| Lead-Free | — | [DATA_NEEDED: lead-free] |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| Number of Terminals | — | 780 |
| Process Node | — | 40 nm |