EP3SL50F780C4N vs EP3SE50F780C4N 比較
詳細並排比較 EP3SL50F780C4N 由 Intel 與 EP3SE50F780C4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SL50F780C4N | EP3SE50F780C4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | NRND |
| Family | Stratix III L | Stratix III E |
| Series | EP3SL50 | — |
| Logic Elements (LEs) | 47,500 | — |
| Number of LABs / CLBs | 1,900 | — |
| Total RAM Bits | 2,184,192 (273 KB) | — |
| Number of User I/Os | 488 | — |
| Number of GPIO | 488 | — |
| 封裝 | 780-BBGA, FCBGA (FBGA-780) | 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch |
| Process Technology | 65 nm CMOS | — |
| Speed Grade | -4 | — |
| 工作溫度 | 0C to +85C (commercial) | 0C to +85C (C4 commercial grade) |
| Core Voltage Range | 0.86 V to 1.15 V | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Lead Free / RoHS | Lead free, RoHS compliant per distributor listing | — |
| Maximum Operating Frequency | 717 MHz (per family) | 717 MHz |
| DSP Blocks | Hard DSP blocks (Stratix III family) | — |
| Memory Interface Support | DDR, DDR2, DDR3 (family feature) | — |
| Logic Elements (LE) | — | 47,500 |
| Embedded Memory Bits | — | 5,760,000 |
| Embedded Memory (M9K/M144K blocks) | — | 488 (per family datasheet) |
| Number of LABs | — | 1900 |
| Maximum User I/Os | — | 488 |
| DSP Blocks (18x18 multipliers) | — | 432 |
| PLLs | — | 12 (per family datasheet) |
| Transceiver Channels | — | Up to 12 (per family, model-dependent) |
| Transceiver Data Rate | — | Up to 6.375 Gbps (per Stratix III E family) |
| Process Node | — | 40 nm |
| 供應電壓 | — | Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail) |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel |
| RoHS 狀態 | — | Lead-free / RoHS compliant |
| MSL 等級 | — | 3 (per JEDEC J-STD-020, FBGA package) |
| Hard Memory Controller | — | DDR2/DDR3 SDRAM (per Stratix III E family) |