EP610PC-15 vs EP610PC-20T 比較
詳細並排比較 EP610PC-15 由 Altera 與 EP610PC-20T 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610PC-15 | EP610PC-20T |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | Classic EPLD | Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 300 gates | 300 gates |
| Macrocells | 16 | — |
| Logic Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Maximum Counter Frequency | 100 MHz (per family datasheet) | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS | — |
| Architecture | PAL-type, sum-of-products AND/OR array | — |
| TTL Emulation | 100% TTL compatible | — |
| 封裝 | PDIP-24 (plastic DIP, 24-pin) | 24-pin PDIP (Plastic DIP) |
| 腳位數 | 24 pins | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| 安裝類型 | Through-Hole (DIP) | Through-Hole |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | unknown |
| Development Tool | Altera MAX+PLUS II | MAX+PLUS II |
| Logic Test Circuitry | On-board for AC/DC verification | — |
| Logic Elements / Macrocells | — | 16 macrocells |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Number of Dedicated Inputs | — | 16 |
| Number of I/O Pins | — | 16 |
| Programmable Output Enable | — | Yes (per macrocell) |
| Programming Technology | — | UV-erasable EPROM, CMOS |