EP610SC-20 vs EP610SC-15 比較
詳細並排比較 EP610SC-20 由 Rochester Electronics 與 EP610SC-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610SC-20 | EP610SC-15 |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EP610 | — |
| Macrocells | 16 | — |
| Gate Equivalent | 300 gates | — |
| Propagation Delay (tPD) | 22 ns | 15 ns |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V typical) |
| Technology | CMOS with EPROM configuration | — |
| 封裝 | 24-pin SOIC (PDSO24) | — |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | Commercial (0C to +70C) [DATA_NEEDED: industrial/military grade availability] | 0 °C to +70 °C (commercial) |
| Logic Levels | 5V CMOS | — |
| I/O Count | [DATA_NEEDED: usable I/O count per datasheet pinout] | — |
| Configuration Memory | EPROM (UV-erasable in windowed variants, OTP in plastic) | — |
| RoHS 狀態 | [DATA_NEEDED: confirm via Rochester product page] | — |
| Manufacturer | Rochester Electronics (authorized source for original Altera design) | — |
| Product Family | — | Altera Classic EPLD |
| Number of Macrocells | — | 16 |
| Usable Gates | — | 300 |
| Maximum Operating Frequency (fMAX) | — | 83.3 MHz (typical) |
| Number of I/O Pins | — | 24 (package-limited) |
| Package Type | — | 24-pin SOP (SOIC-24, 300-mil) |
| Programmable Type | — | EPLD (EPROM-based, OTP for SC package) |
| Process Technology | — | CMOS |
| Architecture | — | Sum-of-products AND/OR with macrocell flip-flop |
| Programming Method | — | EPROM programmer (standard EPROM algorithm) |
| Lead-Free / RoHS | — | non-compliant (legacy Altera Classic family) |
| Erasability | — | One-time programmable for plastic SC package; ceramic windowed variants (LC/DM) are UV-erasable |
| Manufacturer Status | — | Discontinued; Rochester Electronics is the authorized lifecycle source |