EP910ILI-25 vs EP910ILC-25 比較
詳細並排比較 EP910ILI-25 由 Altera 與 EP910ILC-25 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910ILI-25 | EP910ILC-25 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | EP910 (Classic EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Product Terms | 240 (maximum) | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Technology | CMOS, EPROM | CMOS EPROM (UV-erasable) |
| Architecture | PAL-type with global interconnect bus | — |
| 封裝 | PLCC-44 (windowed ceramic, J-lead) | 44-pin JLCC (windowed ceramic) |
| Operating Voltage | 5 V (4.75 V to 5.25 V) | — |
| 工作溫度 | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Programming Method | UV-erasable (windowed), MAX+PLUS II programmer | — |
| Logic Test Circuitry | On-board JTAG-compatible test | — |
| RoHS 狀態 | Non-compliant (windowed ceramic package) | non_compliant (ceramic windowed package) |
| Family | — | EP910 Classic EPLD |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| 安裝類型 | — | Surface Mount |
| 供應電壓 | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| 生命週期狀態 | — | Obsolete - last time buy was late 1990s |