EPC144ILC20 vs EPC1LC20-W 比較

詳細並排比較 EPC144ILC20 由 Intel 與 EPC1LC20-W 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC144ILC20 EPC1LC20-W
品牌 Intel Altera
類別 Memory ICs Memory ICs
生命週期狀態 NRND Obsolete
Manufacturer Altera (now Intel) —
Part Family EPC144 - Configuration EPROM —
記憶體類型 OTP CMOS Configuration EPROM (UV-erasable, factory OTP-programmed) OTP (One-Time Programmable) Configuration PROM
記憶體容量 440,800 bit (54 KB) 1 Mbit
介面 Serial (Altera FLEX/MAX configuration - DCLK / DATA0 / nCONFIG / nSTATUS) Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS)
Supply Voltage VCC 5 V (nominal) —
封裝 PLCC-20 (Plastic Leaded Chip Carrier, JEDEC MS-018) 20-PLCC J-lead (9x9 mm)
工作溫度範圍 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Configuration Mode Master Serial / daisy-chain JTAG-style —
Programmability One-Time-Programmable (factory programmed by Altera with user bitstream) —
JTAG Support Yes (TDI/TDO pins for ByteBlasterMV / USB-Blaster ISP) —
Compatible FPGAs Altera EPF8282, EPF8452, EPF10K-series Classic FPGAs —
RoHS 狀態 [DATA_NEEDED: RoHS compliance] Compliant (Pb-free -W finish)
Lead-Free Status [DATA_NEEDED: lead-free status] —
安裝類型 Surface Mount (PLCC-20 socket or SMT land pattern) Surface Mount (PLCC socket or direct solder)
MSL 等級 [DATA_NEEDED: MSL rating] —
Configuration Clock (DCLK) — 8 MHz maximum
供應電壓 — 3.3 V and 5.0 V
In-System Programming — Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V
Lead Finish — Pb-free (matte tin) - "-W" suffix
Daisy-Chain Support — Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs
Compression Support — Yes - stores compressed Altera FPGA bitstreams
Programming Cycles — 1 (OTP)
Target FPGA Families — Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury

資料表與資源

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