EPM3128ATC144-5 vs EPM3128ATC100-5 比較

詳細並排比較 EPM3128ATC144-5 由 Altera 與 EPM3128ATC100-5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM3128ATC144-5 EPM3128ATC100-5
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family MAX 3000A CPLD - MAX 3000A
Logic Family CMOS CMOS
Device Type CPLD (Complex Programmable Logic Device) —
Number of Macrocells 128 —
Number of Logic Array Blocks (LABs) 8 —
Number of User I/Os 96 —
Device System Gates 2500 —
Product Terms per Macrocell 32 —
Propagation Delay (tPD) 7.5 ns —
Maximum Internal Frequency 192.3 MHz —
Number of Global Clocks 2 —
Program Memory Type EEPROM (non-volatile) EEPROM
Supply Voltage (Core) 3.3 V —
Multi-Volt I/O Voltage 2.5 V / 3.3 V / 5.0 V tolerant —
In-System Programmability Yes (IEEE Std. 1532 compliant) Yes, IEEE Std. 1532 compliant
JTAG / IEEE 1149.1 Yes (boundary-scan + ISP) —
工作溫度 0C to +70C (Commercial) 0 °C to 70 °C (Commercial)
封裝 TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) 100-pin TQFP (Fine Line)
Process Technology 0.30 um CMOS EEPROM, 4 metal layers CMOS EEPROM
RoHS 狀態 Not Compliant (per Arrow distributor listing) [DATA_NEEDED: RoHS status]
ECCN EAR99 —
HTS Code 8542.31.00.55 —
Series — MAX 3000A
Macrocells — 128
Usable Gates — 2,500
User I/Os — 80
Dedicated Inputs — 4
Pin-to-Pin Delay (tpd) — 5 ns (commercial); 7.5 ns
Maximum Frequency (fCNT) — 192.3 MHz
Supply Voltage (VCCINT/VCCIO) — 3.3 V
Output Drive Voltage — 2.5 V or 3.3 V (programmable)
Input Tolerance — 2.5 V, 3.3 V, 5.0 V tolerant
JTAG Boundary Scan — Yes, IEEE Std. 1149.1
安裝類型 — Surface Mount

資料表與資源

瀏覽所有產品 建立 BOM 索取報價