EPM3512AQC208-3 vs EPM3512AQC208-10 比較
詳細並排比較 EPM3512AQC208-3 由 Altera 與 EPM3512AQC208-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM3512AQC208-3 - MAX 3000A CPLD, 512 Macrocells, 172 I/O, PQFP-208 | Altera
EPM3512AQC208-3 ⚠ 最後購買機會規格比較
| 參數 | EPM3512AQC208-3 | EPM3512AQC208-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 32 |
| Maximum User I/O Pins | 172 | — |
| 封裝 | PQFP-208 | 208-pin PQFP |
| Speed Grade | -3 | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| I/O Bank Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multiVolt) | — |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | Yes (IEEE Std. 1532) |
| Boundary-Scan Test | Yes (IEEE Std. 1149.1 / JTAG) | — |
| Program/Erase Cycles | 100 minimum [DATA_NEEDED: exact datasheet figure] | — |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| 工作溫度 | [DATA_NEEDED: industrial/commercial grade range] | 0C to +70 C (commercial) |
| RoHS 狀態 | [DATA_NEEDED: confirm from datasheet] | [DATA_NEEDED: RoHS status not in verified data] |
| 安裝類型 | Surface Mount | — |
| MSL 等級 | [DATA_NEEDED: moisture sensitivity level] | — |
| Usable Gates | — | 10,000 |
| User I/Os | — | 208 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Frequency (fCNT) | — | 116.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| PCI Compliance | — | PCI Local Bus Spec Rev. 2.2 (-10 speed grade) |