EPM5128GC vs EPM5064JC 比較
詳細並排比較 EPM5128GC 由 Altera 與 EPM5064JC 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5128GC | EPM5064JC |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 128 | 64 |
| Usable Gates | 2,500 | 1,250 (approx.) |
| Logic Elements / LABs | [DATA_NEEDED: LAB count] | — |
| User I/Os | 68 | — |
| Package Type | WPGA (Windowed Ceramic Pin Grid Array) | — |
| Package Code | WPGA | — |
| Number of Terminals | 68 | — |
| Terminal Form | PIN/PEG (through-hole PGA with alignment pegs) | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | — |
| Supply Voltage (Vcc) | 5 V | — |
| Process Technology | CMOS, UV-erasable | — |
| Architecture | EPLD, programmable AND/OR array with fixed OR plane | — |
| Propagation Delay (tpd) | [DATA_NEEDED: tpd in ns] | — |
| Maximum Frequency (fmax) | [DATA_NEEDED: fmax in MHz] | — |
| Programmable Security Bit | Yes | — |
| Configuration Memory | Non-volatile UV-EPROM (windowed ceramic) | EPROM (UV-erasable window or OTP) |
| 安裝類型 | Through-Hole (PGA socket required) | Surface Mount (socketed) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | EPLD (Erasable PLD) |
| Logic Array Inputs | — | 36 |
| Logic Array Outputs | — | 64 |
| 封裝 | — | 68-pin PLCC (JEDEC) |
| Supply Voltage (VCC) | — | 5 V (typical, 4.75 V - 5.25 V range) |
| I/O Logic Level | — | TTL / CMOS compatible |
| 工作溫度 | — | [DATA_NEEDED: operating temperature grade] |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: specific tPD grade value] |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fCNT grade value] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus II (legacy device support) |