EPM5192LC-35 vs EPM5192LC-M091A 比較
詳細並排比較 EPM5192LC-35 由 Altera 與 EPM5192LC-M091A 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LC-35 | EPM5192LC-M091A |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | MAX 5000 | — |
| Family | MAX 5000 CPLD | — |
| Logic Elements / Macrocells | 192 macrocells | — |
| Pin-to-Pin Delay (tPD) | 35 ns | — |
| Speed Grade | -35 | — |
| Programmable Type | UV-Erasable / OTP (EPROM-based) | — |
| Package Type | JLCC (J-Lead Ceramic Chip Carrier) | — |
| 安裝類型 | Surface Mount | — |
| Logic Voltage | 5 V TTL-compatible I/O | — |
| 工作溫度 | Commercial (0C to +70C) per LC suffix | [DATA_NEEDED: operating temperature grade] |
| Programming Method | Altera legacy programmer (EPROM-based) | — |
| Architecture | LAB-based with Programmable Interconnect Array (PIA) | — |
| I/O Standard | TTL | — |
| RoHS 狀態 | Non-compliant (ceramic hermetic package) | [DATA_NEEDED: RoHS status for EPM5192LC-M091A] |
| 生命週期狀態 | Obsolete - last-time-buy stock only | — |
| Datasheet Document | Altera MAX 5000 family datasheet (per alldatasheet.com) | — |
| Device Family | — | MAX 5000 EPLD |
| Macrocells | — | 192 |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Logic Array Blocks (LABs) | — | 12 |
| Global Clock Inputs | — | 1 |
| Propagation Delay (tpd) | — | 55 ns (typical, MAX 5000 family) |
| Supply Voltage (Vcc) | — | 5 V |
| Technology | — | UV-erasable CMOS, EPROM-based |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| 封裝 | — | LC (custom pin-grid / customer-specific, M091A designation) |
| 腳位數 | — | [DATA_NEEDED: pin count of LC-M091A package] |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |
| Development Tool | — | Altera MAX+PLUS II (legacy) |