EPM5192LC84 vs EPM5192LI84 比較
詳細並排比較 EPM5192LC84 由 Altera 與 EPM5192LI84 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LC84 | EPM5192LI84 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Type | Complex Programmable Logic Device (CPLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Family | MAX 5000 | — |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| 封裝 | LCC-84 (PQCC84, MS-018) | — |
| 腳位數 | 84 | — |
| 安裝類型 | Surface Mount (Socket-compatible) | Surface Mount (socket-compatible) |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| 供應電壓 | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | OTP / UV-erasable EPROM |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance status] |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Device Family | — | MAX 5000 |
| Usable Gates | — | 3,750 gates |
| Macro Cells | — | 192 |
| Maximum Toggle Frequency | — | 40 MHz |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| User I/O Pins | — | 64 (max) |
| 工作溫度範圍 | — | -40 °C to +85 °C (industrial) |
| Package Type | — | 84-pin PLCC (J-lead, package code J84/QCCJ) |
| Programming Method | — | Stand-alone programmer (no JTAG on LI84 OTP variant) |
| Logic Compatibility | — | TTL-compatible I/O |