EPM7128SLC84-10 vs EPM7128ELC84-12 比較
詳細並排比較 EPM7128SLC84-10 由 Intel 與 EPM7128ELC84-12 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128SLC84-10 | EPM7128ELC84-12 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000S | MAX 7000 (MAX 7000E series) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Logic Gates | 2500 | — |
| User I/Os | 68 | 84 |
| Total Package Pins | 84 | — |
| 封裝 | PLCC-84 (J-lead) | 84-pin PLCC (J-Lead, QCCJ) |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | — |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| 工作溫度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| 安裝類型 | Surface Mount (J-bend) | Surface Mount (PLCC socket compatible) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | Non-compliant (contains lead in PLCC) | Non-compliant (legacy 5V part, SnPb finish) |
| Logic Family | — | CMOS, EEPROM-based |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| 腳位數 | — | 84 |