H5AN8G6NAFR-RDC vs H5AN8G4NAFR-RDC 比較
詳細並排比較 H5AN8G6NAFR-RDC 由 SK hynix 與 H5AN8G4NAFR-RDC 由 SK hynix. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | H5AN8G6NAFR-RDC | H5AN8G4NAFR-RDC |
|---|---|---|
| 品牌 | SK hynix | SK hynix |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | DDR4 SDRAM | DDR4 SDRAM |
| Memory Density | 8 Gb | — |
| 組織 | 512M x 16 | 1G x 4 |
| 供應電壓 | 1.2 V | — |
| 介面 | DDR4 (JEDEC-standard) | Synchronous, differential clock CK_t/CK_c |
| Access Mode | Multi Bank Page Burst | — |
| Package Code | TFBGA | — |
| Package Shape | Rectangular | — |
| Number of Terminals | 96 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Temperature Grade | OTHER (per Partstack listing) | — |
| Technology | CMOS | — |
| RoHS 狀態 | Compliant (Lead-Free & Halogen-Free) | Compliant (Lead-Free) |
| Speed Grade | -RDC (see datasheet for bin timing) | — |
| Family | H5AN8G4NAFR-xxC / H5AN8G8NAFR-xxC / H5AN8G6NAFR-xxC | — |
| Max Clock Rate | [DATA_NEEDED: max clock rate for -RDC bin] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Density | — | 8Gb |
| Supply Voltage (VDD) | — | 1.2 V |
| 封裝 | — | FBGA-78 |
| Data Rate Class | — | [DATA_NEEDED: exact -RDC speed bin MT/s] |
| CAS Latency (CL) | — | [DATA_NEEDED: CL for -RDC bin] |
| Bank Architecture | — | DDR4 bank-group architecture |
| 無鹵素 | — | Yes |
| Refresh | — | Self-refresh and auto-refresh per DDR4 SDRAM standard |
| Manufacturer | — | SK hynix |
| Datasheet Revision | — | Rev. 1.2 / Jul. 2017 |