K3KCKC0BM-JGCT vs K3KL3L30QM-JGCT 比較
詳細並排比較 K3KCKC0BM-JGCT 由 Samsung Electronics 與 K3KL3L30QM-JGCT 由 Samsung Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | K3KCKC0BM-JGCT | K3KL3L30QM-JGCT |
|---|---|---|
| 品牌 | Samsung Electronics | Samsung Electronics |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | LPDDR5 SDRAM | Volatile - DRAM |
| Density | 64 Gb | — |
| 介面 | LPDDR5 (Low Power Double Data Rate 5) | — |
| 組織 | [DATA_NEEDED: organization (x32/x16)] | — |
| Package Type | FBGA (fine-pitch ball grid array) | — |
| Ball Count | [DATA_NEEDED: ball count] | [DATA_NEEDED: ball count] |
| Speed Grade Suffix | JGCT | — |
| Max Pin Speed (family reference K3LKCKC0BM-MGCP) | 6400 Mbps | — |
| Supply Voltage Core (VDD1) | [DATA_NEEDED: VDD1 voltage] | — |
| Supply Voltage I/O (VDD2/VDDQ) | [DATA_NEEDED: VDDQ voltage] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| 安裝類型 | Surface Mount | Surface Mount |
| Refresh Mode | Self-refresh with partial array self-refresh (PASR) | — |
| Power Features | DVFSC, deep power-down | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| Packaging | [DATA_NEEDED: packing type and standard quantity] | Plateau (tray style, per distributor data) |
| Technology | — | LPDDR5X |
| 記憶體容量 | — | 64 Gb |
| Memory Organization | — | x64 |
| Maximum Data Rate | — | 7500 Mbps/pin |
| 介面類型 | — | Parallel LPDDR5X |
| Clock Rate | — | [DATA_NEEDED: clock rate] |
| Supply Voltage VDD | — | [DATA_NEEDED: VDD voltage] |
| Supply Voltage VDDQ | — | [DATA_NEEDED: VDDQ voltage] |
| Access Time / Latency | — | [DATA_NEEDED: CAS latency] |
| 封裝 | — | [DATA_NEEDED: package code and dimensions] |
| Product Status | — | Sampling (per distributor data) |