XC2C32A-4CP56C vs XC2C32A-6CP56C 比較
詳細並排比較 XC2C32A-4CP56C 由 AMD 與 XC2C32A-6CP56C 由 Xilinx. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XC2C32A-4CP56C | XC2C32A-6CP56C |
|---|---|---|
| 品牌 | AMD | Xilinx |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Type | CoolRunner-II complex programmable logic device | CoolRunner-II complex programmable logic device (CPLD) |
| Macrocells | 32 macrocells | — |
| Internal Frequency | 450 MHz | 450 MHz |
| Propagation Delay | 3.8 ns | 4 ns |
| Maximum Pin-to-Pin Logic Delay | 3.0 ns | — |
| User I/Os | 33 pins | — |
| Total Pins | 56 pins | — |
| Core Supply Voltage | 1.8 V | 1.8 V |
| 靜態電流 | 12 µA minimum | 12 µA |
| Process Technology | 0.18 µm CMOS | 0.18 µm CMOS |
| Logic Family | CMOS | CMOS |
| 封裝 | 56-pin CSPBGA, 6 x 6 mm, 0.50 mm pitch | CSP-56, 6 x 6 mm, 0.50 mm pitch |
| Terminal Type | Ball | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | — |
| RoHS 狀態 | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | Lead Free | — |
| Programming Interface | [DATA_NEEDED: programming interface details] | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Macrocell Count | — | 32 macrocells |
| Logic Gate Count | — | 750 gates |
| User I/O Count | — | 33 pins |
| Logic Array Blocks | — | 2 logic array blocks |
| Maximum Operating Frequency | — | 200 MHz |
| Minimum Pin-to-Pin Logic Delay | — | 3.0 ns |
| Internal Supply Voltage Range | — | 1.7 V to 1.9 V |
| Total Package Pins | — | 56 balls |
| 安裝類型 | — | Surface mount |
| Programming Support | — | In-system programmable |
| REACH Status | — | [DATA_NEEDED: REACH status] |