XC2C32A-4CP56C vs XC2C32A-6CP56C 비교

다음의 상세 나란히 비교: XC2C32A-4CP56C 제조: AMD 및 XC2C32A-6CP56C 제조: Xilinx. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

AMD

XC2C32A-4CP56C - 32-Macrocell 450 MHz CPLD | AMD Xilinx

XC2C32A-4CP56C ✓ 활성

Xilinx

XC2C32A-6CP56C ✓ 활성

파라미터	XC2C32A-4CP56C	XC2C32A-6CP56C
브랜드	AMD	Xilinx
카테고리	FPGA & CPLD	FPGA & CPLD
수명 주기 상태	활성	활성
Device Type	CoolRunner-II complex programmable logic device	CoolRunner-II complex programmable logic device (CPLD)
Macrocells	32 macrocells	—
Internal Frequency	450 MHz	450 MHz
Propagation Delay	3.8 ns	4 ns
Maximum Pin-to-Pin Logic Delay	3.0 ns	—
User I/Os	33 pins	—
Total Pins	56 pins	—
Core Supply Voltage	1.8 V	1.8 V
대기 전류	12 µA minimum	12 µA
Process Technology	0.18 µm CMOS	0.18 µm CMOS
Logic Family	CMOS	CMOS
패키지	56-pin CSPBGA, 6 x 6 mm, 0.50 mm pitch	CSP-56, 6 x 6 mm, 0.50 mm pitch
Terminal Type	Ball	—
Package Shape	Square	—
Temperature Grade	Commercial	—
RoHS 상태	Compliant	[DATA_NEEDED: RoHS status]
Lead-Free Status	Lead Free	—
Programming Interface	[DATA_NEEDED: programming interface details]	—
동작 온도 범위	[DATA_NEEDED: operating temperature range]	[DATA_NEEDED: operating temperature range]
Macrocell Count	—	32 macrocells
Logic Gate Count	—	750 gates
User I/O Count	—	33 pins
Logic Array Blocks	—	2 logic array blocks
Maximum Operating Frequency	—	200 MHz
Minimum Pin-to-Pin Logic Delay	—	3.0 ns
Internal Supply Voltage Range	—	1.7 V to 1.9 V
Total Package Pins	—	56 balls
실장 유형	—	Surface mount
Programming Support	—	In-system programmable
REACH Status	—	[DATA_NEEDED: REACH status]