ADS8406IPFBRG4 - 16-Bit 1.25MSPS SAR ADC | Texas Instruments
MPN： ADS8406IPFBRG4 ✓ 啟用中ADS8406IPFBRG4 概覽
An SAR ADC is a type of analog-to-digital converter that uses a binary search algorithm through an internal capacitor-based digital-to-analog converter to compare the sampled input against successive reference-weighted levels, settling to a digital output in N conversion cycles for N bits of resolution. SAR ADCs sit within the broader ADC taxonomy alongside delta-sigma, pipeline, and flash converters, and are valued for low latency, deterministic behavior, and excellent DC accuracy without the latency penalty of oversampling converters.
Key features of the ADS8406IPFBRG4 include 1.25 MHz sample rate, a fully differential analog input that accepts pseudo-bipolar input ranges, an internal low-drift 4.096 V reference, and a wide 2.95 V to 5.25 V analog supply range with a separate digital I/O supply. The device supports both 16-bit parallel output and an 8-bit bus option using two read cycles, simplifying connection to 8-bit microcontrollers and 16-bit DSPs alike. Typical power dissipation is approximately 155 mW at 1.25 MSPS, and the part is specified over the -40 C to +85 C industrial temperature range.
Typical applications include industrial process control, optical networking power monitoring, multi-channel data acquisition systems, medical instrumentation front-ends, and high-speed closed-loop control. The combination of high linearity, internal reference, and parallel interface makes the ADS8406 a strong fit for systems that demand deterministic throughput and DC accuracy rather than high channel density.
When designing with the ADS8406IPFBRG4, decouple AVD and DVDD with separate 1 uF and 100 nF ceramic capacitors placed as close as possible to the supply pins, and use a ground plane to control digital return currents. Drive the analog input with a low-impedance, low-distortion amplifier such as the THS4031 or OPA227 to preserve the converter's linearity at the rated sample rate. Observe the t_acq acquisition-time and t_conv conversion-time timing budgets in the timing diagram to avoid degraded SNR at full throughput.
直接替換替代品，適用於 ADS8406IPFBRG4 — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ADS8406IPFBRG4 （相同外形與佔位） — 差異在於 Package, Input Type, Resolution, Sample Rate, Conversion Time.
ADS8406IPFBTG4
✅ 直接替換聯絡詢價
查看資料表 →ADS8402IPFBR
✅ 直接替換聯絡詢價
查看資料表 →ADS8401IPFBRG4
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ADS8412IBPFBRG4
✅ 直接替換📋 參考替代品（不在目錄中）
ADS8383IPFBRG4
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ADS8406IPFBRG4 最大額定值與電氣特性
| 解析度 | 16 bit |
| Sample Rate | 1.25 MSPS |
| Architecture | SAR (Successive Approximation Register) |
| Number of Inputs | 1 |
| Input Type | Pseudo-bipolar, fully differential |
| Integral Non-Linearity (INL) | 0.0031% (typ) |
| Conversion Time | 650 ns (max) |
| Internal Reference | 4.096 V |
| Analog Supply Voltage (AVDD) | 2.95 V to 5.25 V |
| Digital I/O Supply (DVDD) | 2.7 V to 5.25 V |
| Power Dissipation | 155 mW at 1.25 MSPS |
| Output Interface | Parallel, 16-bit or 8-bit (two read cycles) |
| 工作溫度範圍 | -40 C to +85 C |
| 封裝 | 48-pin TQFP (PFB) 7x7 mm |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
ADS8406IPFBRG4 腳位配置
| 腳位 1 | AVDD — Analog supply (2.95 V to 5.25 V) |
| 腳位 2 | REF — 4.096 V reference output / input |
| 腳位 3 | GND — Analog ground |
| 腳位 4 | IN+ — Differential positive analog input |
| 腳位 5 | IN- — Differential negative analog input |
| 腳位 6 | GND — Analog ground |
| 腳位 7 | AVDD — Analog supply |
| 腳位 8 | AVDD — Analog supply |
| 腳位 9 | GND — Analog ground |
| 腳位 10 | BYTE — Parallel mode select (16-bit / 8-bit) |
| 腳位 11 | D15 — Parallel data output bit 15 (MSB) |
| 腳位 12 | D14 — Parallel data output bit 14 |
| 腳位 13 | D13 — Parallel data output bit 13 |
| 腳位 14 | D12 — Parallel data output bit 12 |
| 腳位 15 | D11 — Parallel data output bit 11 |
| 腳位 16 | D10 — Parallel data output bit 10 |
| 腳位 17 | D9 — Parallel data output bit 9 |
| 腳位 18 | D8 — Parallel data output bit 8 |
| 腳位 19 | DVDD — Digital I/O supply (2.7 V to 5.25 V) |
| 腳位 20 | DGND — Digital ground |
| 腳位 21 | D7 — Parallel data output bit 7 |
| 腳位 22 | D6 — Parallel data output bit 6 |
| 腳位 23 | D5 — Parallel data output bit 5 |
| 腳位 24 | D4 — Parallel data output bit 4 |
| 腳位 25 | D3 — Parallel data output bit 3 |
| 腳位 26 | D2 — Parallel data output bit 2 |
| 腳位 27 | D1 — Parallel data output bit 1 |
| 腳位 28 | D0 — Parallel data output bit 0 (LSB) |
| 腳位 29 | DGND — Digital ground |
| 腳位 30 | DVDD — Digital I/O supply |
| 腳位 31 | RANGE — Input range select |
| 腳位 32 | GND — Ground |
| 腳位 33 | CS — Chip select (active low) |
| 腳位 34 | RD — Read input (active low) |
| 腳位 35 | BUSY — Conversion in progress (active high) |
| 腳位 36 | CONVST — Conversion start input |
| 腳位 37 | RESET — Reset input (active low) |
| 腳位 38 | GND — Ground |
| 腳位 39 | NC — Not connected |
| 腳位 40 | NC — Not connected |
| 腳位 41 | NC — Not connected |
| 腳位 42 | GND — Ground |
| 腳位 43 | AVDD — Analog supply |
| 腳位 44 | GND — Analog ground |
| 腳位 45 | REFGND — Reference ground |
| 腳位 46 | REF — 4.096 V reference |
| 腳位 47 | AVDD — Analog supply |
| 腳位 48 | AVDD — Analog supply |
典型應用
ADS8406IPFBRG4 適用於 6 應用s: Industrial Process Control Data Acquisition, Optical Power Monitoring, Medical Instrumentation Front-End, Multi-Channel Data Acquisition Systems, High-Speed Closed-Loop Control, Test and Measurement Instrumentation.
Industrial Process Control Data Acquisition
The ADS8406IPFBRG4 fits industrial process control because its 16-bit resolution, 0.0031% INL, and 1.25 MSPS throughput digitize thermocouple, RTD, and 4-20 mA conditioned signals with high DC accuracy. Its pseudo-bipolar fully differential input accepts signals that swing around a non-zero common-mode voltage, which is typical of current-shunt and bridge-sensor front-ends on a factory floor. The parallel interface simplifies connection to a host PLC CPU or DSP, and the -40 C to +85 C industrial temperature range covers cabinet-mounted equipment.
推薦
Optical Power Monitoring
The ADS8406IPFBRG4 suits optical power monitoring in DWDM and EDFA systems because its 1.25 MSPS throughput tracks photodiode current transients faster than audio-band converters, while its 16-bit dynamic range resolves milliamp-level tap currents. The fully differential input rejects ground noise from switching power supplies in the line card, and the parallel 16-bit output feeds an FPGA for AGC and alarm decisions. The internal 4.096 V reference eliminates a separate reference IC, reducing BOM count on dense line cards.
推薦
Medical Instrumentation Front-End
The ADS8406IPFBRG4 supports medical instrumentation such as patient monitoring, ECG, and EEG acquisition modules where 16-bit resolution, 0.0031% INL, and 1.25 MSPS sample rate deliver diagnostic-grade accuracy. The pseudo-bipolar fully differential input rejects common-mode interference from power-line and CRT deflection noise, critical for low-amplitude bioelectric signals. The parallel interface simplifies connection to a host DSP that performs digital filtering, and the industrial temperature range covers portable and clinical-grade equipment.
推薦
Multi-Channel Data Acquisition Systems
The ADS8406IPFBRG4 fits multi-channel data acquisition modules where its 1.25 MSPS throughput and deterministic SAR latency allow fast channel-to-channel settling through an external multiplexer. The 16-bit resolution and 0.0031% INL provide DC accuracy for industrial vibration, acoustic, and strain-gage measurements. The parallel interface and 8-bit read mode ease connection to 8-bit MCUs and 16-bit DSPs, and the internal 4.096 V reference simplifies the analog supply chain across multiple channels on the same PCB.
推薦
High-Speed Closed-Loop Control
The ADS8406IPFBRG4 enables high-speed closed-loop control in motor drives, valve positioning, and servo systems where the SAR architecture's deterministic single-cycle conversion produces consistent loop delays at 1.25 MSPS. The 16-bit resolution and 0.0031% INL provide the feedback precision required for current-mode and torque-control loops, while the fully differential input rejects switching noise from the inverter stage. Parallel 16-bit output to an FPGA or DSP enables sub-microsecond loop execution.
推薦
Test and Measurement Instrumentation
The ADS8406IPFBRG4 serves test and measurement instruments such as digital multimeters, oscilloscope front-ends, and bench-top data loggers where 16-bit resolution, 1.25 MSPS throughput, and 0.0031% INL support accurate waveform capture and DC measurement. The pseudo-bipolar fully differential input accepts voltage and current waveforms that swing around a non-zero common-mode level, common in differential probe and shunt measurements. The internal 4.096 V reference and parallel interface simplify integration with bench-instrument signal-processing blocks.
推薦
推薦產品摘要
工程參考資料，適用於 ADS8406IPFBRG4 — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ADS8406IPFBTG4 | ADS8402IPFBR | ADS8401IPFBRG4 | ADS8412IBPFBRG4 | ADS8383IPFBRG4 |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 48-TQFP (PFB) 7x7 mm | 48-TQFP (PFB) - same | 48-TQFP (PFB) - same | 48-TQFP (PFB) - same | 48-TQFP (PFB) - same | 48-TQFP (PFB) - same |
| Resolution | 16 bit | 16 bit | 16 bit | 16 bit | 16 bit | 18 bit |
| Sample Rate | 1.25 MSPS | 1.25 MSPS | 1.25 MSPS | 1.25 MSPS | 20 MSPS (16x faster, pipelined) | 500 kSPS (-60%) |
| Architecture | SAR | SAR | SAR | SAR | Pipelined | SAR |
| Input Type | Pseudo-bipolar fully differential | Pseudo-bipolar fully differential | Pseudo-bipolar fully differential | Unipolar single-ended | Fully differential | Pseudo-bipolar differential |
| Internal Reference | 4.096 V | 4.096 V | 4.096 V | 2.5 V | Internal | Internal |
| Output Interface | Parallel 16-bit / 8-bit | Parallel 16-bit / 8-bit | Parallel 16-bit / 8-bit | Parallel 16-bit / 8-bit | Parallel 16-bit / 8-bit | Parallel 18-bit / byte |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Approx. 1k Price (USD) | 11.92 | Similar (same die) | Similar | Similar | Higher (faster ADC) | Higher (18-bit) |
主要差異化特點
- True 16-bit no-missing-code performance with internal 4.096 V reference (對比ADS8401IPFBRG4)
- Higher sample rate than 18-bit alternative at the same 48-TQFP footprint (對比ADS8383IPFBRG4)
- SAR architecture for deterministic, low-latency conversion (對比ADS8412IBPFBRG4)
設計說明
Decouple AVDD and DVDD with separate 1 uF and 100 nF ceramic capacitors placed as close as possible to the supply pins. Use a ferrite bead or small resistor between AVDD and DVDD to isolate analog and digital return currents. The TI datasheet recommends placing the 1 uF bulk capacitor within 5 mm of each AVDD pin and the 100 nF high-frequency bypass within 1-2 mm. Failure to decouple adequately can couple digital switching noise into the analog front-end and degrade SNR at the full 1.25 MSPS rate.
Use a continuous analog ground plane under and around the ADC, and route digital return currents to a separate digital ground that joins the analog ground at a single point near the ADC ground pins. This star-ground technique prevents digital switching transients from corrupting the analog sample-and-hold. Place the input driver amplifier (e.g. THS4031 or OPA227) within 25 mm of the IN+ and IN- pins to minimize input-capacitance-induced settling errors at 1.25 MSPS.
Observe the t_acq acquisition time and t_conv conversion time timing budgets in the datasheet timing diagram to avoid degraded SNR at full throughput. Driving the analog input with a high-impedance source violates the 650 ns acquisition time and can introduce aperture-dependent gain error. Also, do not toggle CS, RD, or CONVST during the conversion window; consult the timing diagram to ensure t_wH and t_wL pulse widths are met. Lastly, leave the BYTE pin tied to DVDD or DGND through a short trace to prevent the parallel mode from drifting mid-read.
合規資訊
RoHS compliant per TI product page. Not AEC-Q100 qualified (industrial grade). Lead-free (Pb-free) and halogen-free per the -G4 suffix designation.
