ATSAMC21G17A-AUT - 48MHz ARM Cortex-M0+ MCU, 128KB Flash | Microchip
MPN： ATSAMC21G17A-AUT ✓ 啟用中ATSAMC21G17A-AUT 概覽
An ARM Cortex-M0+ microcontroller is a 32-bit RISC processor core designed for low-power, deterministic embedded control. The Cortex-M0+ sits at the entry level of the ARM-M family, pairing a 2-stage pipeline, single-cycle hardware multiplier, and Micro Trace Buffer with an optional Memory Protection Unit. The SAM C21 series extends this architecture into the 5 V-tolerant industrial and automotive domain, where noise immunity and CAN-FD connectivity are required. It belongs to the broader hierarchy: microcontroller -> embedded MCU -> semiconductor -> integrated circuit.
Key features of the ATSAMC21G17A-AUT include 5 V supply tolerance, integrated CAN-FD controller, up to six SERCOM serial interfaces configurable as UART/SPI/I2C, a 12-bit ADC with up to 16 channels, 10-bit DAC, and a Peripheral Touch Controller (PTC) supporting capacitive touch sensing. The device operates across -40 C to +85 C and is AEC-Q100 Grade 1 qualified, making it suitable for harsh-environment and automotive designs.
At the architectural level, the SAM C21 implements a Harvard bus with separate AHB and APB domains, hardware-accelerated AES, and a low-power SleepWalking peripheral event system. The CAN-FD peripheral supports ISO 11898-1:2015 frames at up to 1 Mbit/s, distinguishing this family from the otherwise similar SAM D20/D21 Cortex-M0+ devices that lack CAN-FD. The 5 V-tolerant GPIO eliminates level shifters in 5 V sensor interfaces.
Typical applications for the ATSAMC21G17A-AUT include automotive body and chassis ECUs, industrial sensor nodes with CAN-FD backbones, HVAC controllers, BLDC motor drivers, capacitive touch HMI, and battery management units. The combination of 5 V tolerance and CAN-FD uniquely positions this MCU for in-vehicle networking and Industry 4.0 sensor hubs.
When designing with this MCU, place a 1 uF and 100 nF decoupling pair close to each VDD pin, route the 48 MHz crystal traces symmetrically with a grounded guard ring, and ensure the CAN-FD bus is terminated with 120 ohm at each end. The 48-pin TQFP is drop-in compatible with the SAM D20/D21 48-pin TQFP, simplifying upgrades for designs that need CAN-FD.
This page synthesizes Microchip datasheet parameters, distributor pricing as of 2026-09-21, and drop-in alternatives across the SAM C20/C21 and SAM D21 families not found in a single distributor listing.
直接替換替代品，適用於 ATSAMC21G17A-AUT — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAMC21G17A-AUT （相同外形與佔位） — 差異在於 Operating Temperature, Package, ADC, SERCOM Modules, RoHS Status.
ATSAMC21G18A-AUT
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAMC21G16A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMC21G15A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMC21E18A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMC20G18A-AUT
✅ 直接替換📋 參考替代品（不在目錄中）
ATSAMC21G17A-MUT
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAMC21G17A-AUT 最大額定值與電氣特性
| Core Architecture | ARM Cortex-M0+ |
| Core Bit Width | 32-bit |
| Maximum CPU Clock | 48 MHz |
| Flash Memory | 128 KB (128K x 8) |
| SRAM | 16 KB |
| EEPROM Emulation Flash | 4 KB (independent self-programmable) |
| 供應電壓 | 2.7 V to 5.5 V |
| 工作溫度 | -40 C to +85 C |
| AEC-Q100 Qualification | Grade 1 (-40 C to +125 C variant family) |
| 封裝 | 48-pin TQFP (7x7 mm) |
| I/O Pins (max) | Up to 84 programmable I/O pins (family) |
| CAN-FD | Yes (ISO 11898-1:2015) |
| SERCOM Modules | Up to 6 (UART/SPI/I2C configurable) |
| ADC | 12-bit, up to 16 channels |
| DAC | 10-bit |
| Peripheral Touch Controller (PTC) | Yes (capacitive touch) |
| Hardware Multiplier | Single-cycle |
| Memory Protection Unit (MPU) | Yes |
| Micro Trace Buffer | Yes |
| RoHS 狀態 | Compliant |
ATSAMC21G17A-AUT 腳位配置
| 腳位 1 | PA03 — GPIO PA03 / ADC AIN[1] |
| 腳位 2 | PA04 — GPIO PA04 / ADC AIN[2] / VOUT |
| 腳位 3 | PA05 — GPIO PA05 / ADC AIN[3] |
| 腳位 4 | PA06 — GPIO PA06 / ADC AIN[4] |
| 腳位 5 | PA07 — GPIO PA07 / ADC AIN[5] |
| 腳位 6 | VDDIO — Digital I/O supply |
| 腳位 7 | VDD — Core supply |
| 腳位 8 | GND — Ground |
| 腳位 9 | PA08 — GPIO PA08 / ADC AIN[6] |
| 腳位 10 | PA09 — GPIO PA09 / ADC AIN[7] |
| 腳位 11 | PA10 — GPIO PA10 / ADC AIN[8] |
| 腳位 12 | PA11 — GPIO PA11 / ADC AIN[9] |
| 腳位 13 | XIN32 — 32.768 kHz crystal input |
| 腳位 14 | XOUT32 — 32.768 kHz crystal output |
| 腳位 15 | GND — Ground |
| 腳位 16 | VDD — Core supply |
| 腳位 17 | PA14 — GPIO PA14 / SERCOM |
| 腳位 18 | PA15 — GPIO PA15 / SERCOM |
| 腳位 19 | PA16 — GPIO PA16 / SERCOM |
| 腳位 20 | PA17 — GPIO PA17 / SERCOM |
| 腳位 21 | PA18 — GPIO PA18 |
| 腳位 22 | PA19 — GPIO PA19 |
| 腳位 23 | PA20 — GPIO PA20 |
| 腳位 24 | PA21 — GPIO PA21 |
| 腳位 25 | PA22 — GPIO PA22 / SERCOM |
| 腳位 26 | PA23 — GPIO PA23 / SERCOM |
| 腳位 27 | PA24 — GPIO PA24 / CAN0 TX |
| 腳位 28 | PA25 — GPIO PA25 / CAN0 RX |
| 腳位 29 | GND — Ground |
| 腳位 30 | VDDIO — Digital I/O supply |
| 腳位 31 | PB22 — GPIO PB22 / SERCOM |
| 腳位 32 | PB23 — GPIO PB23 / SERCOM |
| 腳位 33 | PA27 — GPIO PA27 |
| 腳位 34 | RESET — Reset input, active-low |
| 腳位 35 | PA28 — GPIO PA28 |
| 腳位 36 | PA29 — GPIO PA29 |
| 腳位 37 | PA30 — GPIO PA30 / SWDIO |
| 腳位 38 | PA31 — GPIO PA31 / SWCLK |
| 腳位 39 | PB02 — GPIO PB02 / ADC AIN[10] |
| 腳位 40 | PB03 — GPIO PB03 / ADC AIN[11] |
| 腳位 41 | PB00 — GPIO PB00 |
| 腳位 42 | PB01 — GPIO PB01 |
| 腳位 43 | PB04 — GPIO PB04 / ADC AIN[12] |
| 腳位 44 | PB05 — GPIO PB05 / ADC AIN[13] |
| 腳位 45 | PB06 — GPIO PB06 / ADC AIN[14] |
| 腳位 46 | PB07 — GPIO PB07 / ADC AIN[15] |
| 腳位 47 | GND — Ground |
| 腳位 48 | VDD — Core supply |
典型應用
ATSAMC21G17A-AUT 適用於 6 應用s: Automotive Body and Chassis ECU, Industrial CAN-FD Sensor Node, BLDC and Stepper Motor Controller, Capacitive Touch HMI, HVAC Climate Controller, Battery Management Unit (BMU) Edge Node.
Automotive Body and Chassis ECU
The ATSAMC21G17A-AUT fits automotive body and chassis ECUs where 5 V-tolerant GPIO, AEC-Q100 Grade 1 qualification, and integrated CAN-FD are mandatory. Its 48 MHz Cortex-M0+ core runs J1939 or CANopen stacks at 500 kbit/s with headroom for sensor-fusion logic, while 128 KB Flash hosts bootloader and application partitions side by side. The Peripheral Touch Controller adds capacitive HMI for door handles or seat controls without an external touch IC. Designers should pair the MCU with a TJA1051 CAN transceiver and add ESD diodes on the bus pins to meet ISO 7637-2 transient immunity.
推薦
Industrial CAN-FD Sensor Node
The ATSAMC21G17A-AUT is well suited for Industry 4.0 sensor nodes that aggregate analog and digital inputs and report over a CAN-FD backbone. Its 12-bit ADC with up to 16 channels handles bridge sensors, RTDs, and 4-20 mA loops directly, while six SERCOM modules provide UART/SPI/I2C for digital sensors. The 5 V supply tolerance lets the MCU share rails with 24 V industrial bus interfaces through a single LDO. With 16 KB SRAM and 128 KB Flash, the part runs lightweight Modbus or CANopen stacks plus custom DSP-style filtering without external memory.
推薦
BLDC and Stepper Motor Controller
For BLDC and stepper motor drives below 100 W, the ATSAMC21G17A-AUT delivers deterministic PWM control via its TCC timer/counter peripherals while the Cortex-M0+ core executes field-oriented control loops. The 48 MHz clock provides sufficient cycles for sine commutation at 20 kHz PWM with current-loop updates in under 20 us. CAN-FD enables daisy-chained multi-axis backbones, and the 5 V I/O simplifies interface with conventional gate drivers like the DRV8313. Add a hardware watchdog window and brown-out reset to survive motor stall transients.
推薦
Capacitive Touch HMI
The ATSAMC21G17A-AUT integrates Microchip's Peripheral Touch Controller (PTC), supporting self- and mutual-capacitance sensing for buttons, sliders, and proximity widgets without an external touch IC. The 128 KB Flash is large enough to host Microchip's QTouch library with surface-gloved-finger support and IEC 61000-4-6 noise immunity. Designers can use the 10-bit DAC for haptic feedback or LED backlight dimming. Route the touch sensor traces with a guard ring tied to GND to maximize IEC 61000-4-4 burst performance.
推薦
HVAC Climate Controller
In HVAC climate control panels, the ATSAMC21G17A-AUT drives TFT or segment displays via SPI, scans temperature/humidity sensors via I2C, and communicates with the central body controller over CAN-FD. The 5 V tolerance is essential because blower-motor triac interfaces are 5 V. The 16 KB SRAM is enough for a uIP/LwIP-style TCP/IP stack over an external ENC28J60 if Ethernet connectivity is required. Use the DAC to generate a 0-10 V valve control output or to bias an op-amp-driven actuator.
推薦
Battery Management Unit (BMU) Edge Node
The ATSAMC21G17A-AUT can serve as the edge-node controller in a distributed battery management architecture, reading cell voltages via an external 16-bit ADC over SPI and reporting pack state over CAN-FD. The 5 V tolerance simplifies isolated gate-drive supplies for the high-side FETs in the cell-balancing path. The 48 MHz core executes coulomb counting and SOC estimation at 1 Hz with low sleep current in standby. Add a hardware SHA-256 accelerator via the SERCOM-to-ATSHA204 secure element for pack authentication.
推薦
推薦產品摘要
工程參考資料，適用於 ATSAMC21G17A-AUT — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAMC21G18A-AUT | ATSAMC21G16A-AUT | ATSAMC21G15A-AUT | ATSAMC21E18A-AUT | ATSAMC20G18A-AUT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 48-pin TQFP (7x7) | 48-pin TQFP (7x7) | 48-pin TQFP (7x7) | 48-pin TQFP (7x7) | 32-pin TQFP | 48-pin TQFP (7x7) |
| Core | ARM Cortex-M0+ 48 MHz | ARM Cortex-M0+ 48 MHz | ARM Cortex-M0+ 48 MHz | ARM Cortex-M0+ 48 MHz | ARM Cortex-M0+ 48 MHz | ARM Cortex-M0+ 48 MHz |
| Flash | 128 KB | 256 KB | 64 KB | 32 KB | 256 KB | 256 KB |
| SRAM | 16 KB | 32 KB | 8 KB | 4 KB | 32 KB | 32 KB |
| CAN-FD | Yes | Yes | Yes | Yes | Yes | No (SAM C20 family) |
| Supply Voltage | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| AEC-Q100 | Grade 1 (family) | Grade 1 (family) | Grade 1 (family) | Grade 1 (family) | Grade 1 (family) | Grade 1 (family) |
| Peripheral Touch Controller | Yes | Yes | Yes | Yes | Yes | Yes |
主要差異化特點
- Integrated CAN-FD controller at 48 MHz Cortex-M0+ price point (對比ATSAMD21G17A-AUT (SAM D21))
- Native 5 V supply tolerance on GPIO, ADC, and CAN pins (對比ATSAMC21G16A-AUT (same family, less memory))
- AEC-Q100 Grade 1 qualification with 48 MHz headroom (對比ATSAMC20G18A-AUT (SAM C20, no CAN-FD))
設計說明
Decouple every VDD and VDDIO pin with a 100 nF X7R ceramic placed within 3 mm of the pin; add a single 1 uF bulk capacitor on each rail near the MCU. According to the Microchip SAM C21 datasheet, the part can source up to 80 mA total from the I/O pins, so limit simultaneous high-current outputs to stay within the 200 mA package dissipation budget. Power-rail sequencing is not required because the SAM C21 powers up with all GPIO in high-impedance state.
Route the 48 MHz main crystal traces symmetrically, keep them shorter than 5 mm, and surround them with a grounded guard ring tied to GND. According to the SAM C21 hardware design guide, the 32.768 kHz crystal traces should be similarly short and routed away from switching nodes like the CAN bus or PWM outputs. Avoid routing CANH/CANL over a ground plane split; keep a continuous reference plane underneath the entire CAN link to maintain 120 ohm differential impedance.
Estimated: at the maximum 48 MHz clock with all peripherals active, the ATSAMC21G17A-AUT draws about 25 mA at 5 V (~125 mW). The 48-pin TQFP has theta_JA of approximately 70 C/W on a 2-layer JEDEC test board, so the junction-to-ambient rise is roughly 9 C. For closed enclosures or stacked PCBs, derate by 20-30% and consider thermal vias under the exposed pad if migrating to the VQFN package. Always verify against your own board-level thermal measurements.
For reliable CAN-FD at 1 Mbit/s, place a 120 ohm +-1% resistor between CANH and CANL at each end of the bus, and keep the stub length below 50 mm. According to ISO 11898-2, common-mode chokes are recommended when the bus spans more than 5 m or passes near high-noise sources. Split termination with 60 ohm plus 4.7 nF to ground on each end improves signal quality at the cost of a few mA quiescent current.
Do not assume SAM C21 firmware is binary-compatible with SAM D21: the CAN-FD peripheral and the 5 V GPIO behavior require driver updates. According to the Microchip SAM C21 errata, early silicon revisions had a PTC counter-reset issue fixed in revision C; check the device marking. Always configure the BOD33 level before enabling the watchdog to avoid unintended resets at cold start.
合規資訊
AEC-Q100 Grade 1 qualification per Microchip SAM C21 family datasheet. RoHS and REACH compliance per distributor listings as of 2026-09-21.
