PIC18F46Q43-E/MP - 64KB Flash 8-bit MCU 40-QFN XLP | Microchip
MPN： PIC18F46Q43-E/MP ✓ 啟用中PIC18F46Q43-E/MP 概覽
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program and data memory, I/O peripherals, and often analog and communication blocks into one IC. The PIC18F family uses an enhanced 8-bit Harvard architecture with a hardware multiplier, suited for deterministic control and low-power eXtreme Low Power (XLP) operation. The Q43 sub-family adds programmable logic (CLC), DMA, 16-bit PWM, and a 12-bit ADCC with computation capabilities for advanced signal processing directly in hardware.
Key features include 64 KB Flash program memory, 4 KB SRAM, 1 KB EEPROM, three 16-bit PWMs with 32-bit capability, six channels of DMA, a 12-bit ADCC with automated CVD for capacitive touch, and multiple Configurable Logic Cells (CLC), Complementary Waveform Generator (CWG), Zero-Cross Detect (ZCD), and Windowed Watchdog Timer (WWDT). The device supports up to 36 I/O pins, EUSART, SPI, I2C, and PPS (Peripheral Pin Select) for flexible signal routing.
Architecturally, the Q43 family separates analog and digital domains through a 12-bit differential ADCC with hardware averaging, oversampling, and threshold detection, offloading math from the CPU. The integrated DMA moves data between peripherals and memory without CPU intervention, allowing deterministic motor-control and power-conversion loop times at tight PWM frequencies. The CLCs let designers create custom combinational/sequential logic in silicon.
Typical applications include real-time motor control (BLDC, FOC), advanced lighting (dimmable LED drivers), capacitive touch HMI, USB-less consumer appliances, industrial sensor conditioning, and battery-powered IoT endpoints using XLP sleep modes down to sub-uA levels. Designers choose this part when they need CIP-rich peripherals and a 5x5 mm QFN footprint for compact PCBs.
When designing with PIC18F46Q43-E/MP, plan oscillator and PPS assignments early because PPS maps digital functions to specific pins and conflicts can force re-layout. Place the decoupling capacitor network (100 nF + 1 uF + bulk) close to VDD/VSS pairs and follow Microchip AN2483 QFN PCB layout recommendations for proper thermal dissipation through the exposed pad.
This page synthesizes distributor pricing, verified cross-reference alternatives, and practical design guidance drawn from the Microchip PIC18F26-46-56Q43 datasheet, providing information gain beyond the manufacturer's product page.
直接替換替代品，適用於 PIC18F46Q43-E/MP — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： PIC18F46Q43-E/MP （相同外形與佔位） — 差異在於 DAC, Package, Program Memory (Flash), ADC, Core Architecture.
PIC18F46Q43-I/MP
✅ 直接替換📋 參考替代品（不在目錄中）
PIC18F46Q43T-I/MP
✅ 直接替換📋 參考替代品（不在目錄中）
PIC18F45Q43T-I/MP
✅ 直接替換聯絡詢價
查看資料表 →PIC18F46Q10-I/MP
✅ 直接替換聯絡詢價
查看資料表 →PIC18F46Q10-E/MP
✅ 直接替換聯絡詢價
查看資料表 →PIC18F46Q43-E/MP 最大額定值與電氣特性
| Core Architecture | PIC18 8-bit enhanced Harvard |
| 最大時脈頻率 | 64 MHz |
| Instruction Throughput | 16 MIPS |
| Program Memory (Flash) | 64 KB |
| Data SRAM | 4 KB |
| EEPROM | 1 KB |
| 工作溫度範圍 | -40C to +125C (extended, 'E' grade) |
| 封裝 | 40-QFN 5x5 mm with exposed pad |
| I/O Pins | 36 |
| DAC | 8-bit DAC (5-bit), multiple references |
| PWM | 3x 16-bit PWMs (combinable to 32-bit) with complementary outputs |
| DMA Channels | 6 |
| CWG | Complementary Waveform Generator present |
| ZCD | Zero-Cross Detect present |
| WWDT | Windowed Watchdog Timer present |
| Communication | EUSART, SPI, I2C, PPS |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
| Lead-Free | Yes |
| XLP Technology | Yes (eXtreme Low Power) |
PIC18F46Q43-E/MP 腳位配置
| 腳位 1 | RA2 — Digital I/O with ADC and CLC input |
| 腳位 2 | RA3 — Digital I/O with ADC input |
| 腳位 3 | RA4 — Digital I/O |
| 腳位 4 | RA5 — Digital I/O |
| 腳位 5 | VDD — Power supply (1.8 V to 5.5 V) |
| 腳位 6 | VSS — Ground reference |
| 腳位 7 | RB0 — Digital I/O, PPS-mappable |
| 腳位 8 | RB1 — Digital I/O, PPS-mappable |
| 腳位 9 | RB2 — Digital I/O, PPS-mappable |
| 腳位 10 | RB3 — Digital I/O, PPS-mappable |
| 腳位 11 | RB4 — Digital I/O, PPS-mappable |
| 腳位 12 | RB5 — Digital I/O, PPS-mappable |
| 腳位 13 | RB6 — Digital I/O, PPS-mappable |
| 腳位 14 | RB7 — Digital I/O, PPS-mappable |
| 腳位 15 | VSS — Ground reference (second pin) |
| 腳位 16 | VDD — Power supply (second pin) |
| 腳位 17 | RC0 — Digital I/O with PWM output capability |
| 腳位 18 | RC1 — Digital I/O with PWM output capability |
| 腳位 19 | RC2 — Digital I/O with PWM output capability |
| 腳位 20 | RC3 — Digital I/O with PWM output capability |
| 腳位 21 | RC4 — Digital I/O with PWM output capability |
| 腳位 22 | RC5 — Digital I/O with PWM output capability |
| 腳位 23 | RC6 — Digital I/O with EUSART TX capability |
| 腳位 24 | RC7 — Digital I/O with EUSART RX capability |
| 腳位 25 | RD0 — Digital I/O |
| 腳位 26 | RD1 — Digital I/O |
| 腳位 27 | RD2 — Digital I/O |
| 腳位 28 | RD3 — Digital I/O |
| 腳位 29 | RD4 — Digital I/O |
| 腳位 30 | RD5 — Digital I/O |
| 腳位 31 | RD6 — Digital I/O |
| 腳位 32 | RD7 — Digital I/O |
| 腳位 33 | RE0 — Digital I/O with ADC input |
| 腳位 34 | RE1 — Digital I/O with ADC input |
| 腳位 35 | RE2 — Digital I/O with ADC input |
| 腳位 36 | RE3 — Digital I/O |
| 腳位 37 | AVDD — Analog power supply |
| 腳位 38 | AVSS — Analog ground reference |
| 腳位 39 | OSC1/RA0 — Crystal oscillator input or digital I/O |
| 腳位 40 | OSC2/RA1 — Crystal oscillator output or digital I/O |
典型應用
PIC18F46Q43-E/MP 適用於 7 應用s: BLDC / FOC Motor Control, Capacitive Touch HMI, Dimmable LED Lighting Control, Industrial Sensor Signal Conditioning, Battery-Powered IoT Endpoint, Automotive Body Control, Appliance Control (HVAC, White Goods).
BLDC / FOC Motor Control
The PIC18F46Q43-E/MP drives BLDC and PMSM motors with field-oriented control by combining three 16-bit PWMs (combinable into 32-bit center-aligned outputs) with six DMA channels that move ADC samples and timer events without CPU intervention. The 12-bit ADCC with hardware averaging samples phase currents at 64 MHz core clock while the CLC generates commutation timing, freeing CPU for the FOC math loop. Q43's deterministic peripheral timing supports up to ~50 kHz PWM with sub-microsecond jitter, essential for sinusoidal commutation.
推薦
Capacitive Touch HMI
The PIC18F46Q43-E/MP's 12-bit ADCC with computation automates Capacitive Voltage Divider (CVD) techniques for buttons, sliders, and proximity sensors without CPU overhead. Hardware averaging, oversampling, and threshold detection run autonomously while the CPU handles UI logic. Microchip's mTouch library and AN1478 reference design integrate directly, and the 40-QFN 5x5 mm package supports compact touch panels. Low-power XLP sleep modes enable battery-powered touch remotes with sub-uA standby current.
推薦
Dimmable LED Lighting Control
Architectural and commercial LED drivers use the PIC18F46Q43-E/MP because the CWG (Complementary Waveform Generator) and 16-bit PWMs produce hardware-timed PWM dimming up to 32-bit resolution. The ZCD (Zero-Cross Detect) synchronizes with AC line for TRIAC-compatible dimming, and DMA offloads color-mixing math across multiple channels. With extended -40C to +125C operation, the part handles enclosed fixture thermal stress in industrial luminaires and stage lighting installations.
推薦
Industrial Sensor Signal Conditioning
The PIC18F46Q43-E/MP integrates sensor signal conditioning on-chip: 12-bit ADCC with 1 Msps sampling, PGA-equivalent hardware scaling, and DMA feeding data to memory or CLCs for digital filtering. Bridge, thermocouple, and 4-20 mA sensor interfaces benefit from the configurable voltage reference and differential ADC. The extended -40C to +125C rating handles factory-floor environments, and 1.8-5.5 V VDD supports battery or bus-powered 4-20 mA loop transmitters.
推薦
Battery-Powered IoT Endpoint
XLP (eXtreme Low Power) technology on the PIC18F46Q43-E/MP drops sleep current to sub-microamp levels, enabling coin-cell-powered IoT sensors that wake on interrupt, sample via ADCC, transmit via EUSART/SPI, and return to sleep. The 64 KB Flash holds Zigbee/BLE stack fragments or LoRaWAN firmware, and DMA supports low-energy operation without CPU wake-ups. PPS reconfigures pins in sleep to reduce leakage, and Windowed WWDT ensures deterministic timeout recovery in remote deployments.
推薦
Automotive Body Control
The PIC18F46Q43-E/MP's -40C to +125C extended operating range suits under-hood and cabin automotive applications like HVAC actuators, seat controllers, and lighting modules. PPS remaps I/O to match harness pinout changes without board rework, and 64 KB Flash supports AUTOSAR-friendly layered firmware. Although not AEC-Q100 qualified at this suffix, the Q43 family serves as a prototype platform, and Microchip offers AEC-Q100 variants in the PIC18F-Q43 automotive line for production.
推薦
Appliance Control (HVAC, White Goods)
White-goods appliances use the PIC18F46Q43-E/MP for variable-speed compressor, BLDC fan, and triac-driven AC load control. The CLCs implement custom safety interlocks in hardware (over-current shutdown sequences), while WWDT enforces fault recovery. The 40-QFN 5x5 mm package fits space-constrained control boards, and 1.8-5.5 V VDD supports direct connection to rectified 24 V bus rails with simple LDOs. CIP-rich architecture reduces BOM by replacing external logic ICs.
推薦
推薦產品摘要
工程參考資料，適用於 PIC18F46Q43-E/MP — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | PIC18F46Q43-I/MP | PIC18F46Q43T-I/MP | PIC18F45Q43T-I/MP | PIC18F46Q10-I/MP | PIC18F46Q10-E/MP |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 40-QFN (5x5 mm) | 40-QFN (5x5 mm) - same | 40-QFN (5x5 mm) - same | 40-QFN (5x5 mm) - same | 40-QFN (5x5 mm) - same | 40-QFN (5x5 mm) - same |
| Flash Memory | 64 KB | 64 KB | 64 KB | 32 KB | 64 KB | 64 KB |
| Operating Temperature | -40C to +125C (Extended) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +125C (Extended) |
| DMA Channels | 6 | 6 | 6 | 6 | 0 (no DMA) | 0 (no DMA) |
| 12-bit ADCC | Yes | Yes | Yes | Yes | No (10-bit ADC only) | No (10-bit ADC only) |
| PWM Resolution | 16-bit (3x, combinable to 32-bit) | 16-bit (3x, combinable to 32-bit) | 16-bit (3x, combinable to 32-bit) | 16-bit (3x, combinable to 32-bit) | 10-bit PWM (no 16-bit) | 10-bit PWM (no 16-bit) |
| CLC (Configurable Logic Cells) | Yes (4 instances) | Yes (4 instances) | Yes (4 instances) | Yes (4 instances) | No (CLC absent) | No (CLC absent) |
主要差異化特點
- Core Independent Peripherals (CIPs) reduce CPU load (對比PIC18F46Q10-I/MP)
- Higher ADC resolution with computation (對比PIC18F46Q10-I/MP)
- 16-bit PWM for high-resolution control (對比PIC18F46Q10-I/MP)
- Extended temperature grade for harsh environments (對比PIC18F46Q43-I/MP)
設計說明
The 40-QFN 5x5 mm package has an exposed thermal pad (EP) that must be soldered to a copper land on the PCB for proper heat dissipation and electrical grounding. Per Microchip AN2483, place a 100 nF + 1 uF + bulk ceramic decoupling network close to VDD/VSS pairs, route VSS returns directly to the EP, and use multiple thermal vias under the EP to a ground plane on the opposite layer. Without proper EP soldering, thermal resistance theta_JA rises dramatically and the device can overheat at high peripheral activity.
Plan PPS (Peripheral Pin Select) mappings early because PPS assigns digital peripheral functions to specific I/O pins and conflicts require PCB rework. Map PWM outputs to PWM-capable pins (RC0-RC5), EUSART TX/RX to dedicated UART pins (RC6/RC7), and ensure ADC inputs route to analog-capable pins (RA0-RA5, RE0-RE2). Use MPLAB X IDE's Pin Manager to visualize PPS conflicts before fabrication. Crystal oscillator traces (OSC1/OSC2) must be short and guarded by a ground pour to minimize EMI.
Place the analog reference capacitor (0.1 uF + 10 uF) at the AVDD pin with a star-ground connection to AVSS to minimize ADC noise coupling. Route analog traces away from PWM and switching signals, and use Microchip's AN2483 QFN layout guide for proper analog/digital separation. When using 12-bit ADCC at high sample rates, enable hardware averaging and oversampling modes to reduce effective noise floor below 1 LSB. For capacitive touch CVD applications, ensure sensor traces are guarded by ground pours per mTouch design rules.
Common pitfalls when designing with PIC18F46Q43-E/MP include: (1) forgetting to solder the exposed pad which causes overheating and erratic resets, (2) failing to disable unused peripherals in firmware (XLP idle current suffers without proper PMD configuration), (3) using bit-banged I/O instead of PPS-mapped peripherals which wastes PPS flexibility, (4) ignoring the Windowed WWDT timeout window (WDT must be serviced within the configured window, not just before it expires), and (5) underestimating ADC acquisition time at high source impedances - add 1-2 us hold time for sensors above 10 kohm.
合規資訊
RoHS compliant per Microchip product page. Extended temp 'E' grade is -40C to +125C but NOT formally AEC-Q100 qualified at this MPN suffix - AEC-Q100 versions exist in the PIC18F-Q43 automotive line. Lead-free and matte-tin finish per JEDEC J-STD-020 MSL classification. REACH SVHC declaration available on manufacturer website.
