PIC24FJ128GA202-E/SO - 16-bit 32MHz MCU 128KB Flash 28-SOIC | Microchip
MPN： PIC24FJ128GA202-E/SO ✓ 啟用中PIC24FJ128GA202-E/SO 概覽
A 16-bit microcontroller (MCU) is a programmable computing device built around a 16-bit data path, intermediate between 8-bit MCUs (simpler, lower cost, lower performance) and 32-bit MCUs (highest performance). The PIC24F family uses a modified Harvard RISC architecture with 16-bit instructions and 24-bit instruction words, delivering deterministic throughput while keeping the power consumption typical of 8-bit designs. Within the power-management IC hierarchy, MCUs sit alongside voltage regulators, supervisors, and motor drivers, providing the intelligence that controls the analog power chain.
The PIC24FJ128GA202-E/SO's headline features are eXtreme Low Power (XLP) operation with nanoWatt XLP sleep currents as low as 20 nA in deep sleep, an integrated crypto engine supporting AES, DES, 3DES, SHA-1/MD5 hashing, and random number generation, and a rich peripheral set including a 10-bit ADC with up to 13 channels, multiple UART/SPI/I²C interfaces, and configurable PWM/timers. This combination enables secure connected sensor nodes, secure firmware update paths, and battery-powered designs where low standby current is critical.
Technically, the device operates from 2.0 V to 3.6 V, supports internal RC or external crystal oscillators with PLL for 32 MHz operation, and offers 5V-tolerant I/O on most pins. The crypto module offloads encryption from the CPU, leaving MIPS budget for application logic. The integrated 32 KB of EEPROM emulation (via Flash self-write) and the Peripheral Pin Select (PPS) subsystem give designers board-layout flexibility that is uncommon in this class.
Typical applications include secure IoT sensor endpoints, automotive body controllers, secure payment terminals, smart metering, and low-power wireless sensor hubs. The integrated crypto engine makes it well suited to designs that must implement TLS-style secure boot or message authentication without an external security IC.
When designing with this part, take advantage of Peripheral Pin Select (PPS) to remap digital peripherals to alternate I/O pins, simplifying PCB layout. For battery life, the nanoWatt XLP sleep modes drop current to nanoampere levels - use them aggressively by gating peripherals with the PMD module and RTCC for wake.
This page synthesizes distributor pricing from DigiKey and LCSC, drop-in same-package and cross-package alternatives from Microchip and competing vendors, and practical design notes not collected in any single manufacturer datasheet.
直接替換替代品，適用於 PIC24FJ128GA202-E/SO — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： PIC24FJ128GA202-E/SO （相同外形與佔位） — 差異在於 ADC, Family, Package, Program Memory (Flash), Core Architecture.
PIC24FJ128GA202-I/SO
✅ 直接替換📋 參考替代品（不在目錄中）
PIC24FJ128GA202T-I/MM
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ64GA202-I/SO
✅ 直接替換📋 參考替代品（不在目錄中）
PIC24FJ64GB202-E/SO
✅ 直接替換📋 參考替代品（不在目錄中）
PIC24FJ128DA106-I/MR
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GA202-E/SO 最大額定值與電氣特性
| Core Architecture | PIC24F (16-bit RISC, modified Harvard) |
| Family | PIC® XLP™ 24F |
| Maximum CPU Speed | 32 MHz (16 MIPS @ 3.3 V) |
| Program Memory (Flash) | 128 KB (43K × 24) |
| Data SRAM | 8 KB |
| Operating Voltage Range | 2.0 V to 3.6 V |
| Supply Voltage (Nominal) | 3.3 V |
| 封裝 | 28-pin SOIC (SO), wide-body, tube |
| Temperature Grade (E suffix) | -40 °C to +125 °C (automotive / extended) |
| Crypto Engine | Integrated AES, DES/3DES, SHA-1, MD5, RNG |
| ADC | 10-bit, up to 13 channels |
| Communication Interfaces | UART, SPI, I²C (count via PPS) |
| Low-Power Technology | eXtreme Low Power (XLP), nanoWatt |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
PIC24FJ128GA202-E/SO 腳位配置
| 腳位 1 | RA0 — GPIO / analog input / PPS-capable |
| 腳位 2 | RA1 — GPIO / analog input / PPS-capable |
| 腳位 3 | RB0 — GPIO / PGED1 programming |
| 腳位 4 | RB1 — GPIO / PGEC1 programming |
| 腳位 5 | RB2 — GPIO |
| 腳位 6 | RB3 — GPIO |
| 腳位 7 | RB4 — GPIO |
| 腳位 8 | RB5 — GPIO |
| 腳位 9 | RB6 — GPIO |
| 腳位 10 | RB7 — GPIO |
| 腳位 11 | VSS — Ground |
| 腳位 12 | VDD — Positive supply (2.0-3.6 V) |
| 腳位 13 | RA2 — GPIO / analog input |
| 腳位 14 | RA3 — GPIO / analog input |
| 腳位 15 | RC0 — GPIO / PPS-capable |
| 腳位 16 | RC1 — GPIO / PPS-capable |
| 腳位 17 | RC2 — GPIO / PPS-capable |
| 腳位 18 | RC3 — GPIO / PPS-capable |
| 腳位 19 | RC4 — GPIO / PPS-capable |
| 腳位 20 | RC5 — GPIO / PPS-capable |
| 腳位 21 | RC6 — GPIO / PPS-capable |
| 腳位 22 | RC7 — GPIO / PPS-capable |
| 腳位 23 | RA4 — GPIO / analog input |
| 腳位 24 | RA5 — GPIO / analog input |
| 腳位 25 | RA6 — GPIO / analog input |
| 腳位 26 | RA7 — GPIO / analog input |
| 腳位 27 | AVSS — Analog ground |
| 腳位 28 | AVDD — Analog supply (2.0-3.6 V) |
典型應用
PIC24FJ128GA202-E/SO 適用於 6 應用s: Secure IoT Sensor Nodes, Automotive Body Controllers, Secure Payment Terminals, Smart Electricity Meters, Industrial Sensor Hubs, Low-Power Wireless Sensor Beacons.
Secure IoT Sensor Nodes
The PIC24FJ128GA202-E/SO is a strong fit for battery-powered IoT sensor endpoints that require TLS-class secure communications. The integrated AES/SHA crypto engine offloads handshake work from the CPU, and the nanoWatt XLP sleep modes drop standby current below 100 nA, enabling multi-year coin-cell lifetimes. The 128 KB Flash comfortably holds MQTT-SN stacks plus application firmware. Placed on a sensor board with a 3.3 V LDO and a 2.4 GHz radio module, the MCU wakes on the RTCC, authenticates with the cloud, transmits a sample, and returns to deep sleep. Trade-off vs Cortex-M0+ alternatives: lower MIPS ceiling but stronger hardware crypto and lower sleep current.
推薦
Automotive Body Controllers
The -E temperature grade (-40 °C to +125 °C) and integrated crypto engine make the PIC24FJ128GA202-E/SO a practical MCU for automotive body and chassis controllers. A typical LIN-bus node uses one UART for LIN, the 10-bit ADC for switch/analog sensing, and the crypto engine to authenticate diagnostic commands (UDS security access). The 28-SOIC wide-body package withstands thermal cycling and vibration better than QFN, important for under-dash automotive environments. Trade-off: this part does not carry formal AEC-Q100 certification - the -E suffix is Microchip's automotive temperature grade, so confirm with your OEM if formal Q100 documentation is required.
推薦
Secure Payment Terminals
For PIN pads and small payment terminals, the PIC24FJ128GA202-E/SO provides hardware AES/DES and SHA-1/MD5 acceleration required by EMV and PCI-PTS architectures. The 128 KB Flash holds the EMV kernel plus a TLS stack, and the 8 KB SRAM buffers APDUs. The extended temperature range supports outdoor kiosk use. The MCU coordinates a secure keypad matrix (via PPS), a smart-card UART, and an LCD controller. Compared to an external secure-element approach, the integrated crypto reduces BOM cost and PCB area, but the design must still use tamper-detection switches for PCI compliance.
推薦
Smart Electricity Meters
Utility-grade smart meters benefit from the PIC24FJ128GA202-E/SO's combination of low standby current, on-chip crypto for secure firmware update and authenticated billing data, and a wide ADC channel count for power-measurement front ends. The 10-bit ADC samples current/voltage waveforms while a 32.768 kHz external crystal drives the RTCC for time-of-use metering. Deep-sleep XLP modes keep idle current below 1 µA so battery-backed meters retain their clock through line-power outages. Trade-off: for higher-accuracy metrology (0.1 % class), pair with an external 16/24-bit sigma-delta ADC rather than using the internal 10-bit ADC.
推薦
Industrial Sensor Hubs
Factory sensor hubs aggregate multiple analog and digital inputs and forward them over RS-485 or CAN. The PIC24FJ128GA202-E/SO handles up to 13 ADC channels for analog sensors, multiple UART/SPI/I²C ports for digital sensors, and the crypto engine for signed telemetry packets that authenticate the source. The -E temperature grade survives cabinet interiors and outdoor enclosures. The Peripheral Pin Select (PPS) subsystem lets designers route UARTs and timers to any convenient pin, simplifying PCB layout in tight enclosures. Compared to a Cortex-M0 design, BOM cost is competitive while firmware debug is simpler with Microchip's MPLAB X toolchain.
推薦
Low-Power Wireless Sensor Beacons
Battery-powered BLE/Sub-GHz beacon designs use the PIC24FJ128GA202-E/SO as the host MCU paired with a discrete radio transceiver over SPI. The MCU spends most of its time in nanoWatt XLP sleep, waking only to take a sensor reading, encrypt it, and transmit a short packet before returning to deep sleep. Typical average current for a 1 wake/min beacon is 5-10 µA, enabling years of operation from a CR2032. The 28-SOIC wide-body package is easy to rework, which matters for prototype iterations of low-volume sensor products.
推薦
推薦產品摘要
工程參考資料，適用於 PIC24FJ128GA202-E/SO — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | PIC24FJ128GA202-I/SO | PIC24FJ128GA202T-I/MM | PIC24FJ64GA202-I/SO | PIC24FJ64GB202-E/SO | PIC24FJ128DA106-I/MR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-SOIC | 28-SOIC (same) | 28-SOIC (same) | 28-SOIC (same) | 28-SOIC (same) | 28-SOIC (same) |
| Flash Memory | 128 KB | 128 KB | 128 KB | 64 KB | 64 KB | 128 KB |
| SRAM | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| Max CPU Speed | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS |
| Crypto Engine | AES/DES/SHA-1/MD5/RNG | AES/DES/SHA-1/MD5/RNG | AES/DES/SHA-1/MD5/RNG | AES/DES/SHA-1/MD5/RNG | AES/DES/SHA-1/MD5/RNG | AES/DES/SHA-1/MD5/RNG |
| Temperature Grade | -40 °C to +125 °C (E) | -40 °C to +85 °C (I) | -40 °C to +85 °C (I) | -40 °C to +85 °C (I) | -40 °C to +125 °C (E) | -40 °C to +85 °C (I) |
| USB | No | No | No | No | USB 2.0 FS OTG | No |
主要差異化特點
- Integrated crypto engine at this price point (對比PIC24FJ128GA202-I/SO)
- Half the Flash of the 202 family flagship at lower cost (對比PIC24FJ64GA202-I/SO)
- Adds USB 2.0 OTG (對比PIC24FJ64GB202-E/SO)
設計說明
Take advantage of the nanoWatt XLP deep-sleep modes for battery-powered designs. Configure the Peripheral Module Disable (PMD) registers to gate unused peripherals' clocks during sleep, and use the RTCC with an external 32.768 kHz crystal as the only wake source. Typical deep-sleep current is under 100 nA. Estimated: at 3.3 V VDD with PMD configured, expect idle current around 60 nA based on family datasheet figures. Do not leave unused analog modules powered on - the ADC and comparators each draw several µA.
Place a 100 nF decoupling capacitor as close as possible to every VDD pin and a single 10 µF bulk capacitor at the MCU. For the 28-SOIC variant with separate AVDD/AVSS pins, decouple AVDD with its own 100 nF plus a small ferrite bead to isolate analog noise from the digital rail. Keep the 32.768 kHz crystal traces short and symmetric, and guard the SOSCO/SOSCI pins with a ground ring to reduce RTC jitter.
Do not skip configuration of the Configuration bits (FOSC, FWDT, etc.) - the device ships with a default clock source that may not match your design. Always set the JTAG/ICD pins to the correct function before debugging; if PGEC1/PGED1 are remapped, MPLAB X ICD cannot connect. Watch for the brown-out reset (BOR) default - leaving it disabled can corrupt Flash on a slowly rising power rail. When migrating firmware across PIC24F variants, re-verify the device ID and PPS mapping table.
合規資訊
Microchip E grade is the automotive temperature grade, but does not by itself constitute AEC-Q100 certification. Confirm with Microchip for AEC-Q100 documentation if your OEM requires formal Q100 qualification.
