EP2A15B652C7 vs EP2A15F672C7N 对比

详细并排对比 EP2A15B652C7 出自 Intel 和 EP2A15F672C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A15B652C7 EP2A15F672C7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $82.40 $171.00
Family APEX II APEX II
Logic Elements 30000 (approx) —
Typical Gates 1.5 million —
Maximum User I/O Pins [DATA_NEEDED: exact user I/O count] —
Process Technology 0.18 micron CMOS 0.15 µm all-layer copper CMOS
Embedded System Blocks (ESB) Yes - configurable as RAM/ROM or product-term logic —
Supply Voltage - Core [DATA_NEEDED: VCCINT voltage] —
Supply Voltage - I/O [DATA_NEEDED: VCCIO voltage] —
Configuration Method SRAM-based, requires external configuration memory —
Speed Grade -7 -7
工作温度 0C to +85C (commercial, suffix C7) Commercial (0C to +85C)
封装 652-ball BGA 672-ball FC-FBGA (FineLine BGA)
安装类型 Surface Mount Surface Mount (BGA)
Hot Socketing Support Yes (MultiCore hot-socketing) —
RoHS 状态 [DATA_NEEDED: RoHS status - legacy APEX II family] [DATA_NEEDED: RoHS status]
Design Tool Quartus II (legacy) —
Logic Elements (Cells) — 16,640
Embedded Memory Bits — 425,984
User I/Os — 492
Metal Layers — Up to 8
Core Voltage — 1.5 V
Maximum Internal Frequency — 500 MHz
I/O Standards Supported — LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL
LVDS Data Rate — Up to 1 Gbps (True-LVDS)
Configuration Methods — JTAG, Passive Serial

数据手册与资源

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