EP2A25F672C9N vs EP2A25F672C8N 对比
详细并排对比 EP2A25F672C9N 出自 Intel 和 EP2A25F672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A25F672C9N | EP2A25F672C8N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $205.00 |
| Family | APEX II | APEX II |
| Logic Elements / Cells | 24320 | 24,320 |
| System Gates | Approx. 900000 | 900,000 |
| Maximum User I/O | 492 | — |
| Operating Frequency | 236 MHz | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | — |
| 封装 | 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch | 672-ball FC-FBGA (FineLine BGA) |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| Seated Height (max) | 2.100 mm | — |
| Propagation Delay | 2.23 ns | 1.69 ns |
| Logic Family | CMOS | — |
| 工作温度 | 0 °C to +85 °C (commercial, C9 grade) | 0 C to 85 C (commercial) |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport | — |
| LVDS Data Rate | Up to 1 Gbps (True-LVDS) | — |
| Configuration Interface | Serial / Parallel PROM, JTAG, passive parallel (enhanced) | — |
| Embedded Memory | Enhanced System Blocks (ESBs) for dual-port RAM | — |
| Design Software | Quartus II (v5.1 or later) | — |
| RoHS 状态 | Compliant (per distributor listings) | Compliant |
| Technology Node | — | 0.15 um all-layer copper process |
| Maximum Internal Frequency | — | 333 MHz |
| User I/Os | — | 492 |
| Package Body Size | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| Core Supply Voltage | — | 1.5 V |
| Speed Grade | — | C8 |
| Multi-Gigabit Transceiver Rate | — | Up to 1 Gbps per channel |
| Lead-Free Suffix | — | N (lead-free, Pb-free finish) |