EP2A40F672C6N vs EP2A40F672C8N 对比

详细并排对比 EP2A40F672C6N 出自 Intel 和 EP2A40F672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F672C6N EP2A40F672C8N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $165.00 $122.00
Family APEX II APEX II
Logic Elements 40,000 —
Maximum System Gates 1,125,000 —
Embedded RAM Bits 442,368 —
Embedded System Blocks (ESBs) 160 —
Maximum User I/O Pins [DATA_NEEDED: maximum user I/O count] —
Core Voltage 1.5 V —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V —
封装 672-ball FineLine BGA —
工作温度 Commercial (0C to +85C) —
Speed Grade C6 (per part number suffix) C8
Configuration Methods Passive Serial, Passive Parallel, JTAG —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Process Technology SRAM-based, 0.18 um (per family datasheet) —
PLL Count [DATA_NEEDED: PLL count] —
Series — EP2A40
Logic Family — CMOS
System Gates — 1.5 M
Logic Elements / Cells — 38,400
Maximum Operating Frequency — 376 MHz
Propagation Delay — 1.55 ns
Technology Node — 0.15 µm
Process Feature — All-layer copper, up to 8 metal layers
Nominal Supply Voltage (VCCINT) — 1.5 V
Supply Voltage Range — 1.425 V to 1.575 V
User I/Os — 492
Number of Pins / Balls — 672
Package Type — FC-FBGA (FineLine BGA)
Package Dimensions — 27 x 27 mm
Ball Pitch — 1.0 mm
LVDS Data Rate — 1 Gbps
Embedded PLLs — 4
Programming Interface — JTAG (IEEE 1149.1)
Operating Temperature (Commercial) — 0 °C to 85 °C

数据手册与资源

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