EP3SE50F484I4L vs EP3SE50F484I4N 对比
详细并排对比 EP3SE50F484I4L 出自 Intel 和 EP3SE50F484I4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SE50F484I4L | EP3SE50F484I4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,290.00 | $998.00 |
| Family | Stratix III E | — |
| Logic Elements (LE) | 47,500 | 47,500 |
| Logic Array Blocks (LABs) | 1,900 | 1,900 |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | 19,000 |
| Embedded Memory | 5,760 Kbit (5.625 Mbit) | — |
| Embedded Multipliers (18x18) | 384 | 384 |
| Maximum User I/O | 296 | — |
| Maximum Core Clock | 717 MHz (per third-party listing) | — |
| Speed Grade | 4 (slowest) | I4 |
| 工作温度范围 | Industrial (I): -40C to +100C junction | — |
| Process Node | 40 nm CMOS | — |
| 封装 | 484-ball FCBGA (FBGA-484) | 484-ball FC-FBGA (F484) |
| 安装类型 | Surface Mount (BGA) | — |
| 电源电压 | Multiple rails: core 0.9V, I/O 1.2V-3.3V (per Stratix III handbook) | — |
| Configuration Method | Quartus II / EPCS serial / parallel | — |
| Lead-Free (Pb-free) | Yes (L suffix) | — |
| RoHS 状态 | Compliant | — |
| MSL 等级 | MSL3 (per JEDEC J-STD-020, typical for FBGA-484) | — |
| Device Family | — | Stratix III E |
| Embedded Memory (TriMatrix) | — | 2,136 Kbits |
| User I/Os | — | 296 |
| I/O Banks | — | 12 |
| PLLs | — | 8 |
| Global Clock Networks | — | 16 |
| Maximum User I/O Frequency | — | 800 MHz (per DigChip datasheet summary) |
| Process Technology | — | 65 nm CMOS |
| Core Voltage | — | 1.1 V |
| 工作温度 | — | 0 C to +85 C (Industrial) |
| Lead-Free / RoHS | — | Lead-free (per ampheo listing) |