EP3SL200H780C2 vs EP3SL200H780C3N 对比

详细并排对比 EP3SL200H780C2 出自 Intel 和 EP3SL200H780C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL200H780C2 EP3SL200H780C3N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $6,950.00 $4,995.00
Series Stratix III L —
Logic Elements 200,000 200,000
LABs / CLBs 8000 —
Total Memory Bits 10,901,504 —
User I/O Count 488 —
封装 780-BBGA, FCBGA 780-Ball FCBGA (HBGA), 29 x 29 mm
工作温度 0C to +85C (Commercial) 0C to +85C (commercial)
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] 3
Process Node 65 nm 40 nm
Voltage - Core [DATA_NEEDED: core voltage] 0.9 V / 1.0 V (core, VCC)
Voltage - I/O [DATA_NEEDED: I/O voltage] 1.2 V to 3.3 V (VCCIO banks)
DSP Multipliers (18x18) [DATA_NEEDED: 18x18 multiplier count] —
Transceivers [DATA_NEEDED: transceiver count for H780] 24 channels, up to 3.75 Gbps
RoHS 状态 Compliant —
Lead Free Yes —
Family — Stratix III L (low-power)
Embedded Memory Bits — 10,901,504 bits
Logic Array Blocks (LABs) — 8,000
User I/Os — 488
Maximum Internal Clock Frequency — 800 MHz
DSP Blocks — 384
Speed Grade — C3 (commercial, -3 speed)
Lead-Free / RoHS — Yes
Mounting Pitch — 1.0 mm ball pitch
PLLs — 12 (Stratix III PLL array)
Configuration — JTAG IEEE Std 1149.1, passive/active serial

数据手册与资源

浏览全部产品 创建 BOM 获取报价