EP910DI-30 vs EP910IDI-15 对比

详细并排对比 EP910DI-30 出自 Rochester Electronics 和 EP910IDI-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910DI-30 EP910IDI-15
品牌 Rochester Electronics Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $17.60 $29.00
Product Type UV-Erasable Programmable Logic Device (EPLD) —
Family Classic EPLD (Altera EP910 series) Classic EPLD
Macrocell Count 24 —
Propagation Delay (tpd) 30 ns —
Maximum Toggle Frequency (fmax) 62 MHz —
Supply Voltage (VCC) 5 V (single supply) —
Technology CMOS, UV-erasable EPROM CMOS EPROM
封装 CDIP-40 (ceramic DIP, 40-pin with UV window) 40-pin CDIP (CerDIP) with quartz window
安装类型 Through-Hole (DIP) Through-hole (DIP)
Dedicated Inputs 10 —
Dedicated I/O Pins 12 (12 input + 12 output) —
Output Enable Pins 2 —
引脚数量 40 —
Programmable Logic Element JEDEC fuse map (3rd-party programmer) —
工作温度 -40C to +85C (industrial) -40C to +85C (industrial, "I" grade)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance of CDIP windowed part]
Manufacturer (Original) Altera (now Intel PSG) —
Current Distributor / Authorized Aftermarket Rochester Electronics, LLC —
Device Type — CPLD (Complex Programmable Logic Device)
Logic Gates — 450 gates
Macrocells — 24
Maximum User I/O Pins — 36
Pin-to-Pin Propagation Delay (tpd) — 15 ns
Maximum Counter Frequency — 66.6 MHz
Supply Voltage (Vcc) — 5 V
Program/Erase Method — UV-erasable windowed CerDIP
Macrocells Configurable As — D, T, JK, SR flip-flop, or combinatorial
Development Tool — MAX+PLUS II (legacy) / Altera Classic compiler
Programming Hardware — Altera Logic Programmer card
Logic Family Compatibility — Pin-, function-, and JEDEC-map compatible across all EP910 speed grades and packages

数据手册与资源

浏览全部产品 创建 BOM 获取报价