EPC1LI20 vs EPC2LI20 比較

詳細並排比較 EPC1LI20 由 Altera 與 EPC2LI20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC1LI20 EPC2LI20
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete NRND
記憶體類型 OTP Configuration PROM (EPROM-based) Flash (in-system programmable)
記憶體容量 1 Mb (1,048,576 bits) 1.6 Mb (1,572,864 bits)
Configuration Interface Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) Serial or Byte-wide (parallel)
Maximum Configuration Clock 8 MHz —
Supply Voltage (VCC) 5.0 V (4.75 V to 5.25 V) —
Programming Voltage (VPP) 12.75 V (typical, factory-programmed via JTAG) —
封裝 20-pin PLCC (J-lead, 9x9 mm) —
腳位數 20 —
工作溫度 [DATA_NEEDED: operating temperature range] -40 C to +85 C (Industrial)
Cascading Support Yes (nCASC pin for multi-device daisy chain) —
Endurance OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) —
JTAG Programming Yes (in-system via IEEE 1149.1) —
Compatible FPGA Families FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury —
安裝類型 Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
MSL 等級 1 (per Partstack datasheet record) [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] [DATA_NEEDED: RoHS status]
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封裝 / 外殼 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

資料表與資源

瀏覽所有產品 建立 BOM 索取報價