EPM5064LI vs EPM5064JC 对比
详细并排对比 EPM5064LI 出自 Altera 和 EPM5064JC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5064LI | EPM5064JC |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $7.10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable PLD) |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | — |
| Number of Terminals | 44 | — |
| Package Code | QCCJ (PLCC-44, J-bend) | — |
| Package Shape | Square | — |
| Configuration Memory | UV-Erasable / OTP (EPROM-based) | EPROM (UV-erasable window or OTP) |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 5 V (typical, 4.75 V - 5.25 V range) |
| Operating Temperature Grade | Industrial | — |
| 最大时钟频率 | 33.3 MHz | — |
| Propagation Delay (tPD) | 55 ns (typical) | — |
| I/O Pins | 28 bidirectional | — |
| Dedicated Inputs | 7 | — |
| Total User Inputs | 36 | — |
| Process Technology | 1-micron EPIC CMOS | — |
| Latch-up Immunity | 500 mA typical at 125 C | — |
| 安装类型 | Surface Mount | Surface Mount (socketed) |
| RoHS 状态 | [DATA_NEEDED: confirm RoHS status - legacy Altera part] | [DATA_NEEDED: RoHS compliance] |
| Usable Gates | — | 1,250 (approx.) |
| Logic Array Inputs | — | 36 |
| Logic Array Outputs | — | 64 |
| 封装 | — | 68-pin PLCC (JEDEC) |
| I/O Logic Level | — | TTL / CMOS compatible |
| 工作温度 | — | [DATA_NEEDED: operating temperature grade] |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: specific tPD grade value] |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fCNT grade value] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL 等级 | — | [DATA_NEEDED: MSL rating] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus II (legacy device support) |