EPM5192AGC84-15 vs EPM5192AGC84-20 对比

详细并排对比 EPM5192AGC84-15 出自 Altera 和 EPM5192AGC84-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AGC84-15 EPM5192AGC84-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $42.00 $41.20
Family MAX 5000 MAX 5000
Device Type UV-Erasable/OTP Complex PLD —
Macrocells 192 192
Logic Array Blocks (LABs) 12 —
User I/O Pins 64 64
Dedicated Inputs 7 7
Propagation Delay (tPD) 15 ns —
Maximum Internal Clock Frequency 83.3 MHz —
Supply Voltage (VCC) 4.5 V to 5.5 V —
Process Technology CMOS CMOS
Programmable Element UV-Erasable EPROM cell —
封装 84-pin Ceramic PGA (Pin Grid Array) 84-pin Ceramic Pin Grid Array (CPGA, WPGA)
安装类型 Through-Hole Through-Hole (Pin Grid Array socket)
工作温度 Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] —
RoHS 状态 [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] [DATA_NEEDED: RoHS compliance]
Product Type — Complex Programmable Logic Device (CPLD)
Logic Gates (typical) — [DATA_NEEDED: typical gate count]
Maximum Clock Frequency (fMAX) — 66.7 MHz
Pin-to-Pin Delay (tPD) — 20 ns
Speed Grade — -20
Package Code — WPGA
Erasure Method — UV-Erasable (with OTP window)
Operating Temperature Grade — Commercial
电源电压 — [DATA_NEEDED: VCC range]
I/O Standard — 5V CMOS / TTL compatible

数据手册与资源

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