EPM5192GC-2 vs EPM5192GC-1 对比

详细并排对比 EPM5192GC-2 出自 Altera 和 EPM5192GC-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192GC-2 EPM5192GC-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $92.00 $17.85
Family MAX 5000 MAX 5000 (Classic)
Macrocells 192 192
Logic Array Blocks 16 (LABs of 16 macrocells each) —
Usable I/O Pins [DATA_NEEDED: exact user I/O count for PGA package] —
Propagation Delay (tPD) 12 ns typical (-2 grade) —
Counter Frequency 100 MHz minimum —
Supply Voltage (VCC) 5 V nominal 4.75 V to 5.25 V
Technology CMOS EPROM —
Programmable Technology UV-erasable / one-time programmable —
Programming Toolchain Altera MAX+PLUS II —
Package Type Pin Grid Array (PGA), ceramic —
工作温度 Commercial (0C to +70C) [DATA_NEEDED: operating temperature grade]
Speed Grade -2 —
RoHS 状态 Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) [DATA_NEEDED: RoHS status]
安装类型 Through-hole (PGA socket) Through-Hole (PGA)
Logic Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 3,750
Logic Array Blocks (LABs) — 12
Dedicated Inputs — 7
User I/O Pins — 64
Maximum Propagation Delay (tPD) — 40 ns
Maximum Frequency (fMAX) — 62.5 MHz
Process Technology — CMOS, UV-erasable / OTP
封装 — 100-pin Ceramic PGA (GC)
Configuration Method — UV-Erase / One-Time Programmable
Interconnect — Peripheral Interconnect Array (PIA)

数据手册与资源

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