EPM5192LC-2N vs EPM5192LC2 对比

详细并排对比 EPM5192LC-2N 出自 Altera 和 EPM5192LC2 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192LC-2N EPM5192LC2
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $11.85 $17.40
Family MAX 5000 MAX 5000
Macrocells 192 192
Flip-Flops 192 —
Logic Elements 192 macrocells (PAL/GAL-style AND-OR array) —
Package Type LC (ceramic J-leaded, windowed UV-erasable package family) —
Speed Grade -2 (tPD approximately 25 ns) —
Propagation Delay (typical) 25 ns —
电源电压 5 V (typical) —
Programmability UV-erasable EPROM cell —
安装类型 Surface Mount (LC package) Surface Mount
工作温度 Commercial (0C to +70C) - inferred from speed-grade -2 designation [DATA_NEEDED: operating temperature range]
RoHS 状态 Compliant (per -N lead-free suffix) —
Lead-Free Yes (per -N suffix) —
Architecture Programmable Logic Array (PLA) with global PIA —
Programming Interface Altera programming hardware (MAX+PLUS II / ByteBlaster compatible) —
Device Type — EPLD (Erasable Programmable Logic Device)
User I/O Pins — 64
Logic Array Blocks (LABs) — 12
Dedicated Inputs — 7
External Clock Inputs — 1
Propagation Delay (tpd) — 45 ns (LC-2 speed grade)
最大时钟频率 — 50 MHz
Supply Voltage (VCC) — 5 V
Process Technology — CMOS
封装 — PQCC-84 (84-pin Plastic J-Lead Chip Carrier)
Programmable Interconnect — Programmable Interconnect Array (PIA)
Reprogrammability — Windowed UV-erasable (ceramic package variants) / One-time programmable (plastic)

数据手册与资源

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