EPM9560ARC208-10 vs EPM9320RC208-15 对比

详细并排对比 EPM9560ARC208-10 出自 Intel 和 EPM9320RC208-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560ARC208-10 EPM9320RC208-15
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $0.00 $0.00
Device Family MAX 9000A (Multiple Array MatriX) MAX 9000
Programmable Logic Type CPLD (Complex Programmable Logic Device) —
Usable Gates 12,000 gates 6,000
Macrocells 560 macrocells —
Logic Array Blocks 35 LABs [DATA_NEEDED: LAB count]
User I/O Pins 153 I/O —
Propagation Delay (tPD) 10 ns (speed grade -10) —
Internal Frequency 144.9 MHz —
电源电压 5.0 V 5.0 V
Logic Family CMOS —
Configuration Technology EEPROM (non-volatile, in-system programmable) EEPROM-based (non-volatile)
JTAG Interface IEEE 1149.1 boundary-scan (ISP) IEEE Std. 1149.1
工作温度 0 C to +70 C (commercial) [DATA_NEEDED: operating temperature range]
封装 208-pin RQFP (PowerQuad Flat Pack) with exposed pad 208-pin RQFP (Power QFP)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
引脚数量 208 pins —
Macro Cells — 320
Pin-to-Pin Propagation Delay — 15 ns (speed grade -15)
最大时钟频率 — 117.6 MHz
In-System Programmability — Yes (ISP via JTAG)
Package Type — 208-BFQFP Exposed Pad
Number of I/O Pins — [DATA_NEEDED: user I/O count]
生命周期状态 — Obsolete (PDN0706, 2007)

数据手册与资源

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