EPM9560RC208-15 vs EPM9560RC208-16 对比
详细并排对比 EPM9560RC208-15 出自 Altera 和 EPM9560RC208-16 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 Nrnd规格对比
| 参数 | EPM9560RC208-15 | EPM9560RC208-16 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $52.40 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 gates | 12,000 (typical) |
| Macro Cells | 560 macro cells | — |
| Pin-to-Pin Delay | 15 ns | — |
| Counter Speed | 117.6 MHz | — |
| 电源电压 | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| 封装 | 208-pin RQFP (Power Quad Flat Pack) | 208-pin Power Quad Flat Pack (RQFP) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: industrial/commercial temperature grade] |
| Number of I/O Pins | [DATA_NEEDED: number of I/O pins] | — |
| Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Speed Grade | -15 (15 ns pin-to-pin) | -16 |
| Architecture | Third-generation Multiple Array MatriX (MAX) | — |
| Logic Elements / Macrocells | — | 560 macrocells |
| Typical Gates | — | 12,000 gates |
| Pin-to-Pin Delay (tPD) | — | 16 ns |
| Maximum Internal Frequency (fMAX) | — | 117.6 MHz |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V |
| User I/O Pins | — | 416 |
| Process Technology | — | 0.35 µm CMOS EEPROM |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |