ISL68233IRZ - Digital Dual-Output 5-Phase PWM Controller | Renesas
料号： ISL68233IRZ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $4.14 | $4.14 |
| 10 | $3.72 | $37.20 |
| 100 | $3.21 | $321.00 |
| 500 | $2.74 | $1,370.00 |
| 1,000 | $2.31 | $2,310.00 |
ISL68233IRZ 概述
A digital PWM controller is a microprocessor-supervised power-stage manager that drives external MOSFETs and dynamically adjusts switching frequency, phase count, and output voltage via firmware-configurable parameters. The ISL68233 sits within the broader hierarchy of PMBus-managed voltage regulators, which sit under DC-DC controllers, which are a subset of power management ICs used in telecom, datacom, and computing infrastructure.
Key features include PMBus V1.3 and AVSBus digital interfaces for telemetry, fault reporting, and dynamic voltage scaling; pin-strappable or pin-programmable configuration for boot settings; integrated MOSFET drivers for high-current output stages; and support for adaptive dead-time control and current sharing across phases. The 40-TQFN (5x5) package minimizes board footprint while providing the thermal headroom required for multiphase current delivery.
The ISL68233 employs a peak-current-mode control architecture with cycle-by-cycle current balancing between phases, enabling tight load-line accuracy and fast transient response. The digital core implements Renesas's proprietary charge-mode control loop, which compensates automatically over wide operating-condition ranges and eliminates the need for manual loop-component selection. This makes the device well-suited for dense, high-current rails such as core VCORE rails for processors, ASICs, and DDR memory.
Typical applications include POL converters for telecom and datacom infrastructure, DDR memory VTT/VPP rails, server core voltage regulation, ASIC/FPGA multi-rail power, and any high-current point-of-load system requiring digital telemetry and adaptive voltage scaling. The PMBus interface simplifies compliance with adaptive voltage positioning (AVP) schemes in modern processors.
When designing with this device, carefully follow Renesas's recommended external MOSFET selection and PCB layout guidelines for the 5x5 TQFN. Adequate decoupling and a Kelvin-sense connection to the inductor DCR or current-sense resistor are critical for accurate current sharing. The PMBus address and boot configuration must be set through external resistors and stored in non-volatile memory prior to first power-up.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes for the ISL68233 family not found in the manufacturer datasheet alone.
直接替换替代料： ISL68233IRZ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： ISL68233IRZ （相同外形与封装尺寸） ——差异在于 Digital Interface, Maximum Phases (X+Y), Number of Outputs, Operating Temperature, Package.
快速对比工具——选择替代料号进行并排对比：
该产品暂无直接替换替代料。
请求替代料ISL68233IRZ 最大额定值与电气特性
| 拓扑 | Digital multiphase buck PWM controller |
| 输出数量 | 2 (X and Y) |
| Maximum Phases (X+Y) | 5 |
| Configuration Examples | 4+1, 3+2, 3+1, 1+1, 5+0 |
| Digital Interface | PMBus V1.3 / AVSBus |
| 封装 | 40-TQFN (5x5 mm) |
| 安装类型 | Surface Mount |
| Output Polarity | Positive |
| Application | POL, DDR, Infrastructure |
| 工作温度 | -40C to +85C (industrial) |
| RoHS 状态 | Compliant |
| Lead Free | Yes |
| Product Family | ISL68222 / ISL68233 |
ISL68233IRZ 引脚配置
| 引脚 1 | PGND — Power ground return for low-side drivers |
| 引脚 2 | LGATEA — Low-side gate driver output phase A |
| 引脚 3 | PHASEA — Switch node phase A |
| 引脚 4 | UGATEA — High-side gate driver output phase A |
| 引脚 5 | BST_A — Bootstrap capacitor phase A |
| 引脚 6 | VIN — Supply voltage for gate drivers |
| 引脚 7 | VDD — Controller analog/digital supply |
| 引脚 8 | VREF — Internal reference voltage |
| 引脚 9 | FB_A — Output voltage feedback channel A |
| 引脚 10 | VSEN_A — Differential voltage sense channel A positive |
| 引脚 11 | RTN_A — Differential voltage sense channel A return |
| 引脚 12 | IMON_A — Current monitor output channel A |
| 引脚 13 | ISEN_A — Current sense input channel A |
| 引脚 14 | NC — Not connected (per datasheet) |
| 引脚 15 | PGOOD_A — Power-good indicator channel A |
| 引脚 16 | EN_A — Enable input channel A |
| 引脚 17 | SDA — PMBus/AVSBus serial data |
| 引脚 18 | SCL — PMBus/AVSBus serial clock |
| 引脚 19 | ALERTB — PMBus alert interrupt output |
| 引脚 20 | SYNC — Synchronization input for multi-IC operation |
| 引脚 21 | AD0 — PMBus address select bit 0 |
| 引脚 22 | AD1 — PMBus address select bit 1 |
| 引脚 23 | CONFIG — Boot configuration strap pin |
| 引脚 24 | NC — Not connected (per datasheet) |
| 引脚 25 | EN_B — Enable input channel B |
| 引脚 26 | PGOOD_B — Power-good indicator channel B |
| 引脚 27 | ISEN_B — Current sense input channel B |
| 引脚 28 | IMON_B — Current monitor output channel B |
| 引脚 29 | RTN_B — Differential voltage sense channel B return |
| 引脚 30 | VSEN_B — Differential voltage sense channel B positive |
| 引脚 31 | FB_B — Output voltage feedback channel B |
| 引脚 32 | V25 — Internal 2.5 V regulator bypass |
| 引脚 33 | BST_B — Bootstrap capacitor phase B |
| 引脚 34 | UGATEB — High-side gate driver output phase B |
| 引脚 35 | PHASEB — Switch node phase B |
| 引脚 36 | LGATEB — Low-side gate driver output phase B |
| 引脚 37 | PGND — Power ground return for low-side drivers |
| 引脚 38 | PAD — Thermal pad - connect to ground plane |
| 引脚 39 | PAD — Thermal pad - connect to ground plane |
| 引脚 40 | PAD — Thermal pad - connect to ground plane |
典型应用
ISL68233IRZ 适用于 7 应用s: Telecom and Datacom Infrastructure POL, DDR Memory VTT and VPP Rails, Server and ASIC Core Voltage Regulation, FPGA Multi-Rail Power, Industrial High-Current POL Systems, Network Switch and Router Power, AI Accelerator Board Power.
Telecom and Datacom Infrastructure POL
The ISL68233IRZ fits telecom/datacom point-of-load applications because its digital dual-output architecture with up to 5 phases and PMBus V1.3/AVSBus telemetry enables high-current rails with adaptive voltage scaling. The 40-TQFN (5x5) footprint supports dense line-card designs where multiple rails share one controller. Use it between a 12 V intermediate bus and the 0.6 V to 1.8 V core rails of network ASICs, where the part's PMBus monitoring reduces system-level debug time.
推荐
DDR Memory VTT and VPP Rails
The ISL68233IRZ is well suited to DDR4/DDR5 VTT and VPP generation where dual outputs (X+Y ≤ 5) cleanly map to one memory channel's VTT plus VPP rails. Its digital control loop maintains tight load-line accuracy under the dynamic load transients characteristic of DDR read/write bursts, and PMBus telemetry lets the BMC track current and temperature in real time. Position the IC downstream of a 12 V or 5 V intermediate bus, with the VTT rail sized to deliver peak DIMM burst current.
推荐
Server and ASIC Core Voltage Regulation
The ISL68233IRZ drives server-core and ASIC VCORE rails because its 5-phase capability, current-mode control, and adaptive dead-time management deliver the high continuous current demanded by high-TDP processors. The 40-TQFN (5x5) keeps the controller footprint small while external MOSFETs scale current. Use it where AVSBus-based dynamic voltage scaling is required to coordinate core frequency and voltage under thermal constraints.
推荐
FPGA Multi-Rail Power
The ISL68233IRZ targets FPGA multi-rail designs where one rail drives the core (0.85 V to 1.0 V, high current) and another drives transceiver or auxiliary supplies. Its pin-strappable boot configuration lets the system power up with default voltages before PMBus reprogramming. Per Renesas, the digital loop maintains regulation accuracy across load steps from mA to tens of amps, ideal for FPGA transceivers that toggle between idle and active states.
推荐
Industrial High-Current POL Systems
The ISL68233IRZ operates from -40C to +85C, making it appropriate for industrial POL modules where wide temperature swings and high reliability are mandatory. Its PMBus fault reporting (OCP, OVP, UVP, OT) lets system integrators log faults for predictive maintenance. Deploy it in factory automation controllers, robotics power boards, and industrial PCs where multiple high-current rails need centralized telemetry.
推荐
Network Switch and Router Power
The ISL68233IRZ powers network switch line cards where its dual-output flexibility supplies both packet-processor core rails and PHY/MAC rails from a single controller. PMBus V1.3 telemetry integrates with the switch's management plane to log voltage, current, and temperature per port. The 40-TQFN (5x5) footprint keeps controller area small enough to place one per switch ASIC, simplifying PCB partitioning.
推荐
AI Accelerator Board Power
The ISL68233IRZ fits AI accelerator card designs where multiple GPUs or custom ASICs need matched VCORE rails with tight tolerance and fast transient response. Its 5-phase capability scales from a 60 A single rail to two rails of 30 A each, and PMBus telemetry synchronizes with the accelerator's power-management firmware. Use external DrMOS or discrete MOSFETs sized to the rail's continuous and peak currents.
推荐
推荐产品汇总
工程参考数据： ISL68233IRZ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ISL68222IRZ | ISL68233IRAZ | ISL68233IRAZ-T | ISL68222IRAZ | ISL68233IRZ-T |
|---|---|---|---|---|---|---|
| Package | 40-TQFN (5x5) | 40-TQFN (5x5) - same | 40-TQFN (5x5) - same | 40-TQFN (5x5) - same | 40-TQFN (5x5) - same | 40-TQFN (5x5) - same |
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics |
| Topology | Digital dual-output multiphase PWM | Digital multiphase PWM | Digital dual-output multiphase PWM | Digital dual-output multiphase PWM | Digital multiphase PWM | Digital dual-output multiphase PWM |
| Maximum Phases (X+Y) | 5 | 5 | 5 | 5 | 5 | 5 |
| Digital Interface | PMBus V1.3 / AVSBus | PMBus V1.3 / AVSBus | PMBus V1.3 / AVSBus | PMBus V1.3 / AVSBus | PMBus V1.3 / AVSBus | PMBus V1.3 / AVSBus |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Pin Configuration | IRZ suffix, standard pinout | IRZ suffix, ISL68222 family | IRAZ suffix, standard pinout | IRAZ-T suffix, tape & reel | IRAZ suffix, ISL68222 family | IRZ-T suffix, tape & reel |
关键差异点
- Dual-output architecture in 40-TQFN (5x5) reduces component count （对比 ISL68222IRZ)
- Integrated AVSBus interface for adaptive voltage scaling （对比 ISL68233IRAZ-T)
- Pin-compatible family scaling across the ISL6822x lineup （对比 ISL68222IRAZ)
设计说明
Route the high-di/dt loops (UGATE-PHASE, LGATE-PGND, BOOT-CIN) on the ISL68233IRZ PCB using the smallest possible loop area and place ceramic bypass capacitors directly across the driver supply pins. The 40-TQFN (5x5) thermal pad must be soldered to a ground plane with at least 4 thermal vias (9-12 mil drill, 1 oz copper) to keep the controller junction temperature below the 125C maximum under full multiphase loading.
Use a Kelvin-sense connection for VSEN_A/VSEN_B differential feedback and route the pair as a matched-length differential trace from the output capacitor to the IC. For current sensing, place the ISEN resistor or DCR-sense network within 5 mm of the controller to avoid noise pickup on the analog current-share bus. Avoid routing these analog traces near the switch-node (PHASE) copper pours.
Do not assume the ISL68233IRZ and ISL68233IRAZ are pin-identical without checking the suffix decode table - the IRZ and IRAZ variants target different stocking channels but share the same die. PMBus address strapping resistors must be populated before first power-up or the controller will default to address 0x60; pull-ups on SDA/SCL should be 2.2 kohm to 4.7 kohm per the AVSBus specification.
合规信息
RoHS and lead-free compliance per Renesas product page. AEC-Q100 not qualified - for automotive applications contact Renesas about ISL68233-Q1 variants if available.
