EPM5192-1LC vs EPM51929C مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ EPM5192-1LC بواسطة Altera و EPM51929C بواسطة Intel. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | EPM5192-1LC | EPM51929C |
|---|---|---|
| العلامة التجارية | Altera | Intel |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 3,750 | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O Pins | 64 | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tpd) | [DATA_NEEDED: -1 speed grade tpd in ns] | — |
| جهد التغذية | 5 V | [DATA_NEEDED: VCC range] |
| Process Technology | UV EPROM, erasable windowless | — |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| العلبة | 64-pin Ceramic J-Lead Chip Carrier (LC) | — |
| نوع التركيب | Surface Mount | Surface Mount or Through-Hole (package dependent) |
| درجة حرارة التشغيل | 0C to +70C (commercial) | Commercial (0C to +70C) |
| حالة RoHS | Non-compliant (ceramic windowless package, lead-bearing termination) | unknown |
| Device Family | — | MAX 5000 |
| Architecture | — | Multi-array matrix (PAL-based macrocells) |
| Logic Density | — | [DATA_NEEDED: usable gates] |
| Number of Macrocells | — | [DATA_NEEDED: macrocell count] |
| عدد الدبابيس | — | [DATA_NEEDED: pin count] |
| Package Type | — | [DATA_NEEDED: package suffix - C denotes commercial temperature grade] |
| Technology | — | CMOS EPROM |
| Programmability | — | UV-erasable, JEDEC fuse map |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fmax] |
| Lead-Free | — | unknown |
| مستوى MSL | — | [DATA_NEEDED] |