EPM5192LC-25 vs EPM5192LC-2 مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ EPM5192LC-25 بواسطة Altera و EPM5192LC-2 بواسطة Altera. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | EPM5192LC-25 | EPM5192LC-2 |
|---|---|---|
| العلامة التجارية | Altera | Altera |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Elements | 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture) | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Speed Grade | -25 (25 ns) | — |
| العلبة | JLCC-84 (ceramic J-lead chip carrier) | PQCC-84 (PLCC-84, J-lead, surface mount) |
| نوع التركيب | Surface Mount | — |
| Programmable Technology | UV-erasable / OTP (EPROM-based) | — |
| Programming Interface | JTAG / Altera programming hardware (legacy) | — |
| درجة حرارة التشغيل | 0C to +70C (commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| جهد التغذية | 5 V (typical, MAX 5000) | 5 V (typical MAX 5000 family) |
| I/O Standard | TTL-compatible | — |
| Configuration Memory | Non-volatile EPROM (on-chip) | — |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| حالة RoHS | Unknown (legacy ceramic package typically non-RoHS) | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Dedicated Input Pins | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 45 ns (typical, -2 speed grade) |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |