EP610DC-30 vs EP610DM-35 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610DC-30 sa pamamagitan ng Altera at EP610DM-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610DC-30 EP610DM-35
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Product Type Classic EPLD (Erasable Programmable Logic Device) —
Family EP610 (Classic Device Family) —
Macrocells 16 —
Logic Expanders 4 (4 product terms per macrocell) —
Usable Gates 300 —
Maximum Pipelined Clock Frequency 100 MHz —
Propagation Delay (tPD) 30 ns 35 ns
Dedicated Inputs 16 —
I/O Pins 16 (with output enable) 24 dedicated I/O (input + bidirectional)
Packhaging 24-pin CERDIP (windowed) 24-pin CDIP (CERDIP) with UV window
Uri ng Pagpapasok Through-Hole —
Speed Grade -30 (30 ns tPD) —
Technology CMOS EPROM —
Programmability UV-erasable, windowed EPROM UV-erasable, reprogrammable
Security Bit Yes (protects design after programming) —
Output Modes Registered and Combinatorial —
Temperature na Operasyon Commercial (0C to +70C) —
Manufacturer — Altera (Rochester Electronics authorized stock)
Part Family — Classic EPLD
Logic Family — PAL-type EPLD, CMOS, UV-erasable
Number of Macrocells — 16
Number of Gates — 300
Pipelined Data Rate (fMAX) — 100 MHz
Supply Voltage (VCC) — 5 V (single supply)
Temperature Grade (M) — Military -55°C to +125°C
Hanay ng Temperature na Operasyon — -55°C to +125°C
Level ng MSL — [DATA_NEEDED: MSL rating]
Tindminan RoHS — Non-compliant (contains lead, hermetic CERDIP)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita