EP610DC-30 vs EP610DM-35 比較
詳細並排比較 EP610DC-30 由 Altera 與 EP610DM-35 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610DC-30 | EP610DM-35 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | EP610 (Classic Device Family) | — |
| Macrocells | 16 | — |
| Logic Expanders | 4 (4 product terms per macrocell) | — |
| Usable Gates | 300 | — |
| Maximum Pipelined Clock Frequency | 100 MHz | — |
| Propagation Delay (tPD) | 30 ns | 35 ns |
| Dedicated Inputs | 16 | — |
| I/O Pins | 16 (with output enable) | 24 dedicated I/O (input + bidirectional) |
| 封裝 | 24-pin CERDIP (windowed) | 24-pin CDIP (CERDIP) with UV window |
| 安裝類型 | Through-Hole | — |
| Speed Grade | -30 (30 ns tPD) | — |
| Technology | CMOS EPROM | — |
| Programmability | UV-erasable, windowed EPROM | UV-erasable, reprogrammable |
| Security Bit | Yes (protects design after programming) | — |
| Output Modes | Registered and Combinatorial | — |
| 工作溫度 | Commercial (0C to +70C) | — |
| Manufacturer | — | Altera (Rochester Electronics authorized stock) |
| Part Family | — | Classic EPLD |
| Logic Family | — | PAL-type EPLD, CMOS, UV-erasable |
| Number of Macrocells | — | 16 |
| Number of Gates | — | 300 |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Temperature Grade (M) | — | Military -55°C to +125°C |
| 工作溫度範圍 | — | -55°C to +125°C |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| RoHS 狀態 | — | Non-compliant (contains lead, hermetic CERDIP) |