EPF10K250EFC672-3 vs EPF10K250EFC672-2 Comparison
Detailed side-by-side comparison of EPF10K250EFC672-3 by Intel and EPF10K250EFC672-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPF10K250EFC672-3 | EPF10K250EFC672-2 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $99.50 | $108.00 |
| Product Type | FPGA (Field Programmable Gate Array) | β |
| Family | FLEX 10KE | FLEX 10KE |
| Maximum Typical Gates | 250,000 | β |
| Logic Elements (LEs) | 12,160 | β |
| Embedded Memory (EAB) | 655,360 bits (80 EABs x 2,048 bits each) | β |
| Logic Array Blocks (LABs) | 392 (8 LEs per LAB) | β |
| User I/O Pins | 470 | β |
| Core Supply Voltage | 2.5 V | 2.3 V (typical 2.5 V) |
| I/O Supply Voltage | MultiVolt: 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Speed Grade | -3 (fastest) | β |
| Temperature Grade | Commercial (0C to +70C) | β |
| Package | 672-ball FineLine BGA (FC) | 672-BGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch |
| Ball Pitch | 1.0 mm | β |
| Configuration Mode | JTAG (IEEE 1149.1) ISP / serial / parallel, external EPCx PROM | β |
| Process Technology | 0.25 um CMOS, 5-layer metal | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status - 672-FBGA part is non-RoHS per Fly-Wing listing] | Non-RoHS Compliant (per Fly-Wing listing) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Logic Elements | β | 12,480 |
| Typical Gates | β | 250,000 |
| Embedded Array Blocks (EABs) | β | 20 |
| Maximum User RAM Bits | β | 40,960 |
| User I/Os | β | 470 |
| Pin Count | β | 672 |
| Propagation Delay | β | 0.4 ns |
| Operating Temperature | β | 0 C to +70 C (Commercial) |
| I/O Standard Support | β | 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) |
| Logic Family | β | CMOS, SRAM-based |
| Configuration | β | SRAM, in-system programmable (ISP) via JTAG |
| Boundary Scan | β | IEEE 1149.1 (JTAG) compliant |