EPM5016DC-20 vs EPM5032DI-25 Comparison

Detailed side-by-side comparison of EPM5016DC-20 by Altera and EPM5032DI-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5016DC-20 EPM5032DI-25
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $16.50 $18.20
Family MAX 5000 MAX 5000
Device Type EPLD (UV-Erasable Programmable Logic Device) UV-erasable Programmable Logic Device (PLD)
Macrocells 16 32
Product Terms 160 320
Dedicated Inputs 7 7
I/O Pins 8 β€”
Propagation Delay (tPD) 20 ns 25 ns
Maximum Clock Frequency 62.5 MHz β€”
Maximum Supply Voltage 5.25 V β€”
Nominal Supply Voltage 5.0 V β€”
Process Technology CMOS, UV-erasable CMOS
Architecture PAL-type macrocell with Programmable Interconnect Array (PIA) PAL-type, CMOS, AND-OR sum-of-products
Package Type 20-pin Ceramic DIP (Cerdip) with UV window β€”
Package Suffix Code DC = Ceramic DIP, Commercial β€”
Speed Grade -20 = 20 ns tPD β€”
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Programming Method UV erase + EPROM-style programming via Altera programming hardware β€”
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: likely non-compliant due to ceramic DIP]
Logic Gates β€” [DATA_NEEDED: equivalent gate count]
Bidirectional I/O Pins β€” 16
Total Array Inputs β€” 24
Registered Outputs β€” 16
Global Clocks β€” 1
Maximum Clock Frequency (fMAX) β€” 62.5 MHz
Supply Voltage β€” 5 V
Package β€” Ceramic DIP, windowed (UV-erasable)
Pin Count β€” [DATA_NEEDED: exact pin count - 24 or 28]
I/O Standard β€” TTL-compatible
Programmability β€” UV-erasable, EPROM-based
Development Tool β€” MAX+PLUS II / A+PLUS
Lifecycle β€” Not Recommended for New Designs (NRND)

Datasheets & Resources

Browse All Products Create BOM Request Quote