EPM5192LC-2N vs EPM5192JC-2 Comparison

Detailed side-by-side comparison of EPM5192LC-2N by Altera and EPM5192JC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-2N EPM5192JC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $11.85 $22.50
Family MAX 5000 β€”
Macrocells 192 192
Flip-Flops 192 β€”
Logic Elements 192 macrocells (PAL/GAL-style AND-OR array) β€”
Package Type LC (ceramic J-leaded, windowed UV-erasable package family) β€”
Speed Grade -2 (tPD approximately 25 ns) β€”
Propagation Delay (typical) 25 ns β€”
Supply Voltage 5 V (typical) β€”
Programmability UV-erasable EPROM cell β€”
Mounting Type Surface Mount (LC package) Surface Mount
Operating Temperature Commercial (0C to +70C) - inferred from speed-grade -2 designation β€”
RoHS Status Compliant (per -N lead-free suffix) [DATA_NEEDED: RoHS compliance]
Lead-Free Yes (per -N suffix) β€”
Architecture Programmable Logic Array (PLA) with global PIA β€”
Programming Interface Altera programming hardware (MAX+PLUS II / ByteBlaster compatible) β€”
Device Family β€” MAX 5000
Product Type β€” UV-erasable Programmable Logic Device (PLD)
Logic Array Blocks (LABs) β€” 12
Interconnect β€” Programmable Interconnect Array (PIA)
User I/O Pins β€” 64
Dedicated Inputs β€” 7
External Clock Inputs β€” 1
Propagation Delay (tPD) β€” 45 ns
Maximum Clock Frequency β€” 40 MHz
Process Technology β€” CMOS
Package β€” 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed)
Number of Terminals β€” 84
Programming Method β€” UV-erase / EPROM
Operating Temperature Range β€” [DATA_NEEDED: operating temperature range]

Datasheets & Resources

Browse All Products Create BOM Request Quote