EPM9320RI208-20C vs EPM9320RC208-15 Comparison

Detailed side-by-side comparison of EPM9320RI208-20C by Altera and EPM9320RC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320RI208-20C EPM9320RC208-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.10 $0.00
Family MAX 9000 β€”
Device Type EE PLD / CPLD β€”
Logic Elements / Macrocells 320 β€”
Usable Gates 6,000 6,000
Number of Flip-Flops 484 β€”
Logic Array Blocks (LABs) 16 β€”
Maximum Internal Clock Frequency 100 MHz β€”
Pin-to-Pin Propagation Delay (tPD) 20 ns β€”
Supply Voltage (VCCINT/VCCIO) 5.0 V β€”
I/O Voltage Tolerance 3.3 V or 5.0 V β€”
Programmable Interface JTAG (IEEE Std. 1149.1) BST β€”
In-System Programmability Yes (5.0 V ISP via JTAG) Yes (ISP via JTAG)
Technology CMOS EEPROM β€”
Package 208-pin RQFP (Plastic Quad Flat Pack) 208-pin RQFP (Power QFP)
Operating Temperature (Industrial) -40C to +85C β€”
Mounting Type Surface Mount Surface Mount
Lead-Free / RoHS Information not confirmed from verified data [DATA_NEEDED: RoHS status] β€”
Device Family β€” MAX 9000
Macro Cells β€” 320
Pin-to-Pin Propagation Delay β€” 15 ns (speed grade -15)
Maximum Clock Frequency β€” 117.6 MHz
Supply Voltage β€” 5.0 V
Configuration Technology β€” EEPROM-based (non-volatile)
JTAG Interface β€” IEEE Std. 1149.1
Package Type β€” 208-BFQFP Exposed Pad
Operating Temperature β€” [DATA_NEEDED: operating temperature range]
Number of I/O Pins β€” [DATA_NEEDED: user I/O count]
Logic Array Blocks β€” [DATA_NEEDED: LAB count]
RoHS Status β€” [DATA_NEEDED: RoHS status]
Lifecycle Status β€” Obsolete (PDN0706, 2007)

Datasheets & Resources

Browse All Products Create BOM Request Quote