EPM9320RI208-20N vs EPM9320RI208-10N Comparison
Detailed side-by-side comparison of EPM9320RI208-20N by Altera and EPM9320RI208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320RI208-20N | EPM9320RI208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $27.20 |
| Device Family | MAX 9000 (EPM9320) | β |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | β |
| Macrocells | 320 | β |
| Flip-Flops | 484 | β |
| Propagation Delay (tPD) | 20 ns | β |
| Supply Voltage (VCC) | 5.0 V | β |
| I/O Voltage Tolerance | 3.3 V or 5 V configurable | β |
| Package | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin RQFP (PowerQuad II) |
| Package Lead Pitch | 0.500 mm | β |
| Number of Terminals | 208 | β |
| Operating Temperature Range | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| In-System Programmability | Yes, 5.0 V ISP via JTAG | Yes (JTAG/ISP) |
| JTAG Interface | IEEE Std. 1149.1 compliant | β |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Dedicated Input Pins | 4 (low-skew global distribution) | β |
| Minimum DC Input on I/O Pins | -0.5 V | β |
| Minimum DC Input on Dedicated Inputs | -0.3 V | β |
| Input Undershoot/ Overshoot | -2.0 V / 7.0 V for <20 ns (no-load) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (N suffix = lead-free) |
| Family | β | MAX 9000 |
| Device Type | β | Complex Programmable Logic Device (CPLD) |
| Usable Gates | β | 6,000 |
| Macro Cells | β | 320 |
| Logic Array Blocks (LABs) | β | 20 |
| Pin-to-Pin Propagation Delay (tPD) | β | 10 ns |
| Maximum System Clock Frequency | β | 100 MHz |
| Supply Voltage | β | 5 V |
| I/O Voltage | β | 5 V |
| User I/O Pins | β | 160 |
| Lead Finish | β | Lead-free (matte tin) |
| MSL Level | β | [DATA_NEEDED: MSL level] |