EPM9560GC280-20N vs EPM9560GC280-15 Comparison

Detailed side-by-side comparison of EPM9560GC280-20N by Altera and EPM9560GC280-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560GC280-20N EPM9560GC280-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $285.00 $115.00
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) EE PLD (CMOS EEPROM-based CPLD)
Architecture Multiple Array MatriX (MAX), 3rd generation Multiple Array MatriX (MAX)
Technology CMOS EEPROM-based CMOS EEPROM, 0.5 um process (MAX third-gen)
Usable Gates 6,000 to 12,000 β€”
Macrocells 560 β€”
User I/O Pins 212 β€”
Pin-to-Pin Delay (tPD) 20 ns β€”
Maximum Counter Frequency 144 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V β€”
I/O Voltage 3.3 V or 5 V (configurable) β€”
In-System Programmability Yes (5.0-V ISP via IEEE 1149.1 JTAG) β€”
Package 280-pin CPGA (Ceramic Pin Grid Array) β€”
Configuration Memory EEPROM (non-volatile, instant-on) β€”
PCI Compliance Yes β€”
Operating Temperature [DATA_NEEDED: industrial/commercial grade] β€”
RoHS Status [DATA_NEEDED] Non-compliant (ceramic CPGA, contains lead)
Macro Cells β€” 560
Typical Gates β€” 12,000
Maximum Operating Frequency β€” 117.6 MHz
Propagation Delay (tpd) β€” 15 ns (speed grade -15)
Propagation Delay (alternate datasheet figure) β€” 16.6 ns
Supply Voltage (VCCINT/VCCIO) β€” 5.0 V
Operating Temperature (Commercial) β€” 0C to +70C
Package Type β€” CPGA-280 (Ceramic Pin Grid Array, 280 pins)
Mounting Type β€” Through-Hole
Programmability β€” In-System Programmable (ISP) via JTAG IEEE 1149.1
Lifecycle Status β€” Obsolete (legacy Altera MAX 9000 family)

Datasheets & Resources

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