EP2SGX130GF40C4NGB vs EP2SGX130GF40C4NES Vergleich
Detaillierter Direktvergleich von EP2SGX130GF40C4NGB von Intel und EP2SGX130GF40C4NES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2SGX130GF40C4NGB - Stratix II GX FPGA, 132K LEs, 6.6K LABs | Intel
EP2SGX130GF40C4NGB ObsoleteIntel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2SGX130GF40C4NGB | EP2SGX130GF40C4NES |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $640,00 | $1.380,00 |
| Series | Stratix II GX | — |
| Family | Enhanced Configuration (EPC) Devices | Stratix II GX |
| Logic Elements | 132,540 | 132,540 |
| Logic Array Blocks (LABs) | 6,627 | — |
| User I/O Pins | 734 | 734 |
| Gehäuse | 1508-ball FBGA (GF40) | — |
| Terminal Pitch | 1.00 mm | — |
| Speed Grade | C4 | C4 (speed grade -4) |
| Temperature Grade | Commercial (0C to 85C) | — |
| Transceivers | Up to 20 multi-gigabit transceivers | — |
| Max Transceiver Data Rate | 6.375 Gbps | — |
| PLLs | 8 | — |
| On-chip Memory | TriMatrix memory (block RAM + distributed RAM) | — |
| DSP Blocks | Yes (embedded multipliers) | Yes (variable, see datasheet) |
| Configuration | Enhanced / EPC mode | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Logic Blocks / ALMs | — | Approximately 53,000 ALMs |
| Process Technology | — | 90 nm CMOS |
| Core Voltage | — | 1.2 V |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Transceiver Channels | — | Up to 20 (4 to 20, device-dependent) |
| Total Package Pins | — | 1508 (FC-FBGA ball grid) |
| Package Code | — | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) |
| Internal Operating Frequency | — | Up to 717 MHz |
| Embedded Memory | — | Approximately 4.5 Mbits (TriMatrix) |
| PLL Blocks | — | 8 |
| Montageart | — | Surface Mount (flip-chip BGA) |
| Lead-Free / RoHS | — | Yes (LEAD FREE per datasheet family code) |
| MSL-Level | — | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] |
| Betriebstemperatur | — | Commercial Extended (per N suffix) |
| JEDEC Standard Reference | — | MS-034AAU-1 |